Difference between revisions of "Allwinner A1X"
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A1x family chips.
== A10 ==
== A10 ==
Revision as of 02:00, 27 December 2011
This page is a overview of A1x family chips.
The Allwinner A10 CPU has been developed in, and is sold in, the People's Republic of China. Its mass-volume price is around $7, yet it is a 400-pin highly feature-rich 1.5ghz ARM Cortex A8 with a MALI400 GPU. It has the distinction of having the highest bang-per-buck ratio of any SoC available at the time of writing, by quite a margin. Its price and features is causing massive disruption of the tablet market in China (a minor recession was caused by widespread cancellation of prior committments to other SoCs!), as every factory in Shenzen scrambles to compete with hundreds of other factories for the same end-user market: tablets(see A10_tablets) and PVRs.
For comparison: TI has brought out a new $5 ARM Cortex A8, but it is limited to 500mhz and it is extra cost for the version with a PowerVR 3D GPU. Ingenic's jz4770 is about $7 in mass-volume but it is a 1ghz MIPS with a Vivante GC600 3D GPU. Details are harder to get hold of regarding the jz4770, but its interfaces are known not as feature-rich as the Allwinner (no HDMI output for example). AMLogic's Cortex A9 is $13 in mass-volume, but is limited to 800mhz and a maximum of 512mb of RAM.
Features of the Allwinner A10 include:
- 1.5ghz Cortex A8 ARM Core
- MALI400MP OpenGL ES 2.0 GPU
- 2160p Hardware-accelerated Video playback (4x the resolution of 1080p)
- up to 1gb of DDR3 (800mhz) RAM
- a NAND Flash Controller that is capable of 8-way concurrent DMA (8 NAND ICs) as well as supporting up to 500mhz DDR2 RAM
- 4 SDIO interfaces (SD 3.0, UHI class)
- USB 2.0 Host as well as a 2nd USB-OTG Interface (USB-OTG can be reconfigured as USB 2.0 Host, automatically)
- 24-pin RGB/TTL as well as simultaneous HDMI out
- SATA-II 3gb/sec
- 10/100 Ethernet (MII compatible)
- a 2nd 24-pin RGB/TTL interface that is multiplexed (shared) on the same pins for a standard IDE (PATA) interface.
- GPIO, I2C, PWM, Keyboard Matrix (8x8), built-in Resistive Touchscreen Controller, and much more.
Unsurprisingly, this CPU has been chosen as the first CPU for an Embedded_Open_Modular_Architecture/PCMCIA CPU module by Rhombus Tech. The critical decisive factor however was the immediate support of Allwinner's Board of Directors for releasing full GPL Source Code, to help the RHT Initiative to foster better relations and closer ties with Free Software Developers.
GPL Kernel Source Code
The GPL Linux kernel source code download location and build instructions are available at this page: kernel_compile. Discussions or questions please use the firstname.lastname@example.org mailing list (registration required at http://lists.phcomp.co.uk/mailman/listinfo/arm-netbook)