BeagleBoardPWM

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There are three pins capable of PWM (pulse-width modulation) exposed on the C3/C4 BeagleBoard expansion header. PWM is useful for control of a number of devices, from LEDs (which can be faded smoothly with PWM) to DC motors. For robotics, this means that three hobby servos can easily be controlled by the Beagle given nothing more than a simple BeagleBoard_Hardware_Interfacing#Level_Shifting level-shifting circuit.

OMAP Mux Configuration

Because the PWM pins are not set as such by default, the OMAP's mux must be configured to expose them before they can be used. See BeagleBoardPinMux for more details on this procedure. The short version is to add the following lines to the definition of board_mux[] in arch/arm/mach-omap2/board-omap3beagle.c (this has been tested with the 2.6.32 OMAP branch of the kernel).

OMAP3_MUX(DSS_DATA15, OMAP_MUX_MODE2|OMAP_PIN_OUTPUT), /* GPT9_PWMEVT, ball AB26, ex pin 4 */
OMAP3_MUX(UART2_TX, OMAP_MUX_MODE2|OMAP_PIN_OUTPUT), /* GPT11_PWMEVT, ball AA25, ex pin 6 */
OMAP3_MUX(UART2_RTS, OMAP_MUX_MODE2|OMAP_PIN_OUTPUT), /* GTP10_PWMEVT, ball AB25, ex pin 10 */

Obviously these lines should precede the line terminating the array.

Activating PWM via Timer Registers

PWM output on the BeagleBoard is done via the OMAP processor's general-purpose timer mechanism, described in the OMAP35x TRM in section 16.2.4 (page 2546). To briefly summarize this (and simplify significantly), the general-purpose timer is a continuously-incrementing counter that can be configured to toggle the PWM output high when a certain value is reached, and low when it overflows. By adjusting the first number the duty cycle can be set. Setting the value the counter starts at can be used to set the frequency of the PWM.

"The registers TCRR, TLDR, and TMAR are illustrated as boxes partially-filled from the right.  Lines at the value of TLDR, the value of TMAR, and the end are labeled 'Start', 'Match', and 'Overflow' respectively.

"A square waveform starting at 0, with the beginning labeled as 'Start'.  Where the waveform goes to 1 it is labeled 'Match', and when it returns to zero it is labeled 'Overflow, Start'.  It then repeats."

Each GP timer has a 4K block for memory-mapped registers (see TRM Table 16-12). The start addresses of these blocks for the timers on the BeagleBoard are listed below.

BeagleBoard C4 GP Timer Base Addresses
Timer Base address Expansion header pin
GPTIMER9 0x4904 0000 4
GPTIMER10 0x4808 6000 6
GPTIMER11 0x4808 8000 10

These are the registers relevant to our purpose:

BeagleBoard C4 GP Timer Registers
Name TRM section Offset Description
TCLR 16.3.2.6 (p. 2568) 0x024 Control register.
TCRR 16.3.2.7 (p. 2570) 0x028 The counter. Increments with the clock when the timer is running.
TLDR 16.3.2.8 (p. 2571) 0x02c Timer load register. Holds the value assumed by TCRR when it overflows.
TMAR 16.3.2.11 (p. 2575) 0x038 Value to be compared with the counter.


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