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Difference between revisions of "BeagleBone PRU Notes"

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=== PRU capabilities ===
 
=== PRU capabilities ===
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[[File:PRUSS.png|AM335x PRUSS]]
File:PRUSS.png|AM335x PRUSS
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* The PRU has dual 32-bit RISC cores, shared data and instruction memories and an interrupt controller (INTC).
 
* The PRU has dual 32-bit RISC cores, shared data and instruction memories and an interrupt controller (INTC).

Revision as of 12:01, 18 April 2013

BeagleBone PRU

The goal of this page is to record information that is pertinent to getting started with the BeagleBone's AM335x Programmable Real-time Unit (PRU).

This is also called the PRU Subsystem (PRUSS) or PRU and Industrial Controller Subsystem (PRU-ICSS). It is optimized to perform embedded tasks that require real-time constraints.

Most important is the purssdrv library to expose functions to the PRU. You can load this library by typing modprobe uio_pruss.

PRU capabilities

AM335x PRUSS

  • The PRU has dual 32-bit RISC cores, shared data and instruction memories and an interrupt controller (INTC).
  • 8KB data memory and 8KB instruction memory
  • 12KB shared RAM
  • A small, deterministic instruction set

There is no pipelining done on the processor and there are 29 (r1-r30) registers to use.

Software examples

BeagleBoard/TI has provided example C programs that utilize the PRU on github.

These include: PRU_memAccess_DDR_PRUsharedRAM, PRU_memAccessPRUDataRam, PRU_PRUtoPRUInterrupt, and a PRU assembler.