Difference between revisions of "BeagleBone PRU Notes"

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These include: PRU_memAccess_DDR_PRUsharedRAM, PRU_memAccessPRUDataRam, PRU_PRUtoPRUInterrupt, and a PRU assembler.
 
These include: PRU_memAccess_DDR_PRUsharedRAM, PRU_memAccessPRUDataRam, PRU_PRUtoPRUInterrupt, and a PRU assembler.
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 +
=== Instruction Set ===
 +
Nearly all instructions (with exception of accessing memory external to PRU) are single-cycle execute (5 ns when running at 200 MHz)
 +
 +
==== Four instruction classes ====
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* Arithmetic
 +
* Logical
 +
* Flow Control
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* Register Load/Store
 +
 +
==== Instruction Syntax ====
 +
* Mnemonic, followed by comma separated parameter list
 +
* Parameters can be a register, label, immediate value, or constant table entry
 +
* Example
 +
** SUB r3, r3, 10
 +
** Subtracts immediate value 10 (decimal) from the value in r3 and then places the result in r3

Revision as of 13:18, 18 April 2013

The goal of this page is to record information that is pertinent to getting started with the BeagleBone's AM335x Programmable Real-time Unit (PRU).

BeagleBone Programmable Real-time Unit

This is also called the PRU Subsystem (PRUSS) or PRU and Industrial Controller Subsystem (PRU-ICSS). It is optimized to perform embedded tasks that require real-time constraints.

Most important is the purssdrv library to expose functions to the PRU. You can load this library by typing modprobe uio_pruss.

PRU capabilities

AM335x PRUSS

  • The PRU has dual 32-bit RISC cores, shared data and instruction memories and an interrupt controller (INTC).
  • 8KB data memory and 8KB instruction memory
  • 12KB shared RAM
  • A small, deterministic instruction set

There is no pipelining done on the processor and there are 29 (r1-r30) registers to use.

Software examples

BeagleBoard/TI has provided example C programs that utilize the PRU on github.

These include: PRU_memAccess_DDR_PRUsharedRAM, PRU_memAccessPRUDataRam, PRU_PRUtoPRUInterrupt, and a PRU assembler.

Instruction Set

Nearly all instructions (with exception of accessing memory external to PRU) are single-cycle execute (5 ns when running at 200 MHz)

Four instruction classes

  • Arithmetic
  • Logical
  • Flow Control
  • Register Load/Store

Instruction Syntax

  • Mnemonic, followed by comma separated parameter list
  • Parameters can be a register, label, immediate value, or constant table entry
  • Example
    • SUB r3, r3, 10
    • Subtracts immediate value 10 (decimal) from the value in r3 and then places the result in r3