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please note this page is in updating, it has been merging from the old version of wiky, so keep patient, i will rewrite this documentation in pretty as soon as possible

in case you need a pdf copy of the old doc, or if you need attachments feel free to ask me for them ( speeder@alice.it )

DHT-Walnut is a shortened name for the Digital Home Technologies PCB 01070201 Rev. 1.1. The DHT-Walnut board is based on the AMCC-Walnut (still available, and still expensive :P). It is a more improved board described at www.amcc.com. A "walnut" searching will inform about schematic and software. Also keep attention @ DENX: they have developed a lot for the AMCC-Walnut board, and you could find a linux patch for your problem, prettier documentation, developer suit, and much more: in case, you are suggested to have a look to their web pages.

Well, the board consists of:

* PowerPC 405GP] running at 266mhz
* PC133 SDRAM slot, currently, only supports single sidded DIMMs
* On-chip 405GP ethernet, board doesn't have an ethernet MAC address (the monitor/bootloader is able to fix it)
* DCE serial port, speeds up to 230k, only tested to 115200bps
* two pci slots, keyed for 5V only cards
* Promise Technologies ["PDC20265"] IDE
* 512k of boot [amd29lv040b.pdf flash AMD 29LV040B]
 * it is soldered on the PCB
 * if you like to use a socket you have to consider the bootloader will check for the flash manufactor ID, so or you replace the 29LV040B with an other socked-29LV040B, or you have to modify the bootloader
* 12v dc powered
 * 2A max
 * it is able to feed the hard disk
* 6.00" x 7.5" board size

The system's most common configuration seems to be:

* System PCB
* no RTC (the real time clock chip is missing)
* the board has issues with more than 128M: if you inspect the pcb, you will see that the DIMM connector has same pin missing, this is the reason why you can't use DIMM bigger than 128M
* PCI IEEE-1394 card supported by OHCI driver
* PCI additional ethernet board
* needed cause the on board ethernet is implemented by the IBM-ppc-405GP, for example netbsd is not able to drive it, so in case you need an additional board, the one provided with DHT is good enough
* PPCBoot v.1.1.2 in flash (it has issues with environment, it need to be replaced with a gooder one)

an image of the board:


JTAG & OCD Commander

The OCD Commander is macraigor's free debugger software, which allows you to connect to your supported target type chip via the On-Chip Debug port (BDM or JTAG) using a Macraigor hardware device. You will be able to test the connection, memory access, modify memory and registers, run code and more using this product. This debugger is not designed to be used to program flash devices connected to your target.

The OCD Commander software is supported under Windows 98/ME, NT, 2000, 2003, XP operating systems

supported devices

* mpDemon
* Raven
* Wiggle
* usb2demon
* usb2sprite
* usbwiggler

(see [:DHT-WalnutAddJ10:How To build the JTAG Wiggle interface & add the JTAG connector at J10])

Just in case you make a brick, you could fix the jam, using this procedure: [:DHT-WalnutJtagBootloaderInstallation:JTAG Bootloader Installation]

Experimental hack to set a hardware breakpoint inside OCD Commander attachment:hardbreak.tgz * OCD Commander macro file to dump the CPU configuration (all but PCI) attachment:dump_config.mac

* OCD Commander macro file to configure the system for recovery attachment:recovery_config.mac
* CPU configuration of the system after a warm reset attachment:warm_reset.config
* CPU configuration of the system once ppcboot v1.1.2 is up and running attachment:ppcboot.config
* CPU configuration of the system once ppcboot v1.1.6 is up and running attachment:ppcboot_116.config
* Example OCD logfile of the using the recovery macro to load ppcboot attachment:ocd_recovery_log.txt
* Example console log from ppcboot v.1.1.6 running from ram after recovery macro attachment:ocd_recovery_console_log.txt


* ppcboot
 * Here is the latest ppcboot 1.1.6 patch, as is, it will build for flashing at 0xfff80000 as a replacement for the pcboot-1.1.2 that comes with the board.
 * attachment:patch-ppcboot-1.1.6-km2 Original sources for ppcboot: ftp://ftp.denx.de/pub/ppcboot/ppcboot-1.1.6.tar.bz2
 * Here is a binary for those without a toolchain. attachment:ppcboot1.1.6.1.bin crc = 083fb0a3
* S-Record attachment:ken_ppcboot.srec
 * use this (at your own risk) see the detailed update procedure description: [:DHT-WalnutInstallingTheUpdatedBootloader:Installing the Updated Bootloader]
* U-Boot
 * It is a significantly updated replacement for ppcboot.
 * [:DHT-Walnut-U-Boot:U-Boot for the DHT-Walnut]
 * DENX U-Boot and Linux Guide for Walnut  

Linux Kernels

* Version 2.4 (Mostly) working kernel binary and config from jbevren with matrox fbcon and usb input support. Current issues:
 * USB keyboard input doesnt seem to work, but events reach /dev/input/event0
 * attachment:uImage
 * attachment:config
* Version 2.6
See: [:DHT-Walnut2.6LinuxKernel:2.6 Linux kernel for the DHT-Walnut].


* [:DHT-Walnut-DebianInstall:Debian GNU/Linux netboot installer] -- Install Debian from the internet to a hard disk.
* Netbsd has a port for "IBM PowerPC 405GP based Walnut evaluation board", this is not the DHT-Walnut, this is an other way to call the AMCC-Walnut (yes just to be confusing). Ok, it is not for DHT-Walnut, but this port could be (easealy / hardly) adapted to the DHT-Walnut with some work / over work. 

Hardware that is known to work with Linux

There is a list of the Hardware that is known to work (and not to work) with this board.

[:DHT-Walnut-Known-Working-Hardware:see it, here] and feel free to add, comment, feedback about it.

Linux has a problem in the source's tree: the Walnut has been originally ported to arch=ppc, while the new kernel tree is around arch=powerpcc, for this reason you need to specify the right arch or your compiler will have issues. Developers will port everything to arch=powerppc in the future. Kernel 2.6.12 is free of this problem, newer than .12 have it.


* How To [:DHT-WalnutInstallingTheUpdatedBootloader:replace the bootloader with ppcboot 1.1.6]
* How To [:DHT-Walnut-U-Boot:replace the bootloader with U-boot 1.1.4]
* How To [:DHT-WalnutJtagBootloaderInstallation:recover from "Brickage"]
* How To [:DHT-WalnutBootViaTftp:boot via tftp]
* How To [:DHT-WalnutBootingFromHdd:boot from Hard Disk]
* How To [:DHT-WalnutGPIO:control the Green Media LED and J5]
* How To [:DHT-WalnutUsefullProjects:do something useful with your board]
* More to come...

People you could contact if you need help

* people on irc freenode #edev #mklinux may be asked about
* ddc (i'm currently use this board for an university project running gentoo-ppc)
 * msn daredevil-coder@hotmail.com
 * email mr.ddc@alice.it
* you ... if you want ;-)

U-Boot 1.1.4

Information on U-Boot can be found at [1]

The source for U-Boot 1.1.4 is downloadable from ftp://ftp.denx.de/pub/u-boot/u-boot-1.1.4.tar.bz2

Here is a patch that makes it work on the DHT-Walnut: u-boot-dht-walnut-df2.patch.

A binary that can be copied to the DHT-Walnut flash at 0xfffc0000 is available here: u-boot-1.1.4-df2.bin

Changes since u-boot-1.1.4-df1.bin:

* A default ethaddr is now set: de:ad:be:ef:00:00
* The ethaddr can be changed as often as you like.  Use: setenv ethaddr be:ef:be:ef:be:ef ; saveenv
* Only the first two memory banks of a DIMM are used.  This allows us to use (half of) double-sided

Some things to note when changing from ppcboot to U-Boot:

* Default baudrate is 115200.
* Occupies flash addresses 0xfffc0000-0xffffffff  (256MB).
* Maintains two copies of environment data, primary copy at 0xfffb0000, backup copy at 0xfffa0000.

Installing U-Boot 1.1.4 on the DHT Walnut

* Boot the board and bring it to the ppcboot (or U-Boot) console prompt.
* Download the new bootloader [attachment:u-boot-1.1.4-df2.bin u-boot-1.1.4-df2.bin] into RAM:
 * Using Kermit (you'll need a terminal emulator that supports the kermit file transfer mode):
 => loadb 800000 115200
 {{{## Switch baudrate to 115200 bps and press ENTER ...
    1. Ready for binary (kermit) download ...
    2. Start Addr = 0x00800000
    3. Switch baudrate to 9600 bps and press ESC ...


 * or tftpboot (requires a tftp server and setting the environment variables ethaddr, ipaddr and serverip)
 => tftpboot 800000 u-boot-1.1.4-df2.bin
 {{{Using ppc_4xx_eth0 device

TFTP from server; our IP address is Filename 'u-boot.bin'. Load address: 0x800000 Loading: #################################################### done Bytes transferred = 262144 (40000 hex) }}}

* Verify that the download was received correctly (crc should be 0xd3cef189):
=> crc 800000 40000
{{{CRC32 for 00800000 ... 0083ffff ==> d3cef189


* Unprotect the last 4 sectors:
=> protect off fffc0000 ffffffff
{{{Un-Protected 4 sectors


From this point on, do *not* power down the board, and type *very* carefully. This is the critical section.

* Erase the last four sectors:
=> erase fffc0000 ffffffff
{{{Erase Flash from 0xfffc0000 to 0xffffffff

Erasing sector fffc0000 .Erasing sector fffd0000 .Erasing sector fffe0000 .Erasing sector ffff0000 . done Erased 4 sectors}}}

* Copy the new bootloader into flash:
=> cp.b 800000 fffc0000 40000
{{{Copy to Flash... done


* Verify that the image is correct (crc of u-boot-1.1.4-df2.bin is 0xd3cef189).
=> crc fffc0000 40000
{{{CRC32 for fffc0000 ... ffffffff ==> d3cef189


End of critical section. Congratulations!

* Reset the board and see that the new version booted!
  * Don't forget to change your baud rate to 115200!
=> reset

U-Boot 1.1.4 (Feb 16 2006 - 17:15:06)

CPU: AMCC PowerPC 405GP Rev. E at 266.640 MHz (PLB=66, OPB=33, EBC=33 MHz)

      Internal PCI arbiter enabled, PCI async ext clock used
      16 kB I-Cache 8 kB D-Cache

Board: DHT Walnut I2C: ready DRAM: 128 MB FLASH: 512 kB PCI: Bus Dev VenId DevId Class Int

       00  04  105a  0d30  0101  1d

In: serial Out: serial Err: serial Net: ppc_4xx_eth0 IDE: Bus 0: OK

 Device 0: not available
 Device 1: not available

BEDBUG:ready }}}

You will see a message like : *** Warning - bad CRC, using default environmentBR That's normal. It will go away after you issue a saveenv command.

This bootloader works well with the 2.6 Linux kernel available [wiki:DHT-Walnut2.6LinuxKernel here].

Please let me know of any success or issues you encounter. dale-elinux@farnsworth.org

    1. page was renamed from JtagBootloaderInstallation

Recovering a bricked DHT Walnut board

Using OCD Commander, a JTAG adapter, and GPSFan's ram resident ppcboot, it is possible to reprogram the flash. In short, use OCD Commander to turn on the sdram, download the ram targeted ppcboot, and install a new bootloader.

You'll need a macro file recovery_config.mac and the ppcboot image attachment:ppcboot_ram.s19 .

There's also an experimental ram-resident version of u-boot-1.1.4 attachment:u-boot-ram.s19 that can be downloaded to 0x400000. Source diffs against the current version from CVS, incorporating the patches from both GPSFan and dfarnsworth: attachment:u-boot-ram.patch . Expect to see much more output at boot, as this version has debug output turned on. (Other changes include setting the entry point in the linker script, output files renamed to u-boot.s19 and u-boot.elf, sdram config disabled, added debug info on code relocation, and a modified default environment.)

* Start OCD Commander, connect to the board, reset, and halt.


* The CPU should be ready to fetch the first instruction:


{{{ PC: FFFFFFFC CR: 00000000 MSR: 00000000 LR: 01FD327C B -524028 }}}

* Configure the system:

>recovery_config (Or hit the macro button and navigate to the recovery_config.mac file.)

{{{ >endian big BIG Endian set for WORD and DASM commands >dcr 0x086 = 0x0400D038 ; 0x086: PLB0_BEAR R PLB Bus Error Address Register >dcr 0x0A0 = 0x03000000 ; 0x0A0: POB0_BESR0 R/Clear PLB to OPB Bus Error Status Register 0 >dcr 0x0B1 = 0x0000102E ; 0x0B1: CPC0_CR0 R/W Chip Control Register 0 >dcr 0x010 = 0x30 >dcr 0x11 = 0x20880000  ; offset 0x30: SDRAM0_RTR R/W Refresh Timer Register >dcr 0x010 = 0x40 >dcr 0x11 = 0x00046001  ; offset 0x40: SDRAM0_B0CR R/W Memory Bank 0 Configuration Register >dcr 0x010 = 0x48 >dcr 0x11 = 0x01046001  ; offset 0x48: SDRAM0_B2CR R/W Memory Bank 2 Configuration Register >dcr 0x010 = 0x80 >dcr 0x11 = 0x010A801A  ; offset 0x80: SDRAM0_TR R/W SDRAM Timing Register 1 >dcr 0x010 = 0x20 >dcr 0x11 = 0x80800000  ; offset 0x20: SDRAM0_CFG R/W Memory Controller Options 1 >dcr 0x012 = 0x00 >dcr 0x13 = 0xFFF18000  ; offset 0x00: EBC0_B0CR R/W Peripheral Bank 0 Configuration Register >dcr 0x012 = 0x01 >dcr 0x13 = 0xF0018000  ; offset 0x01: EBC0_B1CR R/W Peripheral Bank 1 Configuration Register >dcr 0x012 = 0x02 >dcr 0x13 = 0xF0118000  ; offset 0x02: EBC0_B2CR R/W Peripheral Bank 2 Configuration Register >dcr 0x012 = 0x03 >dcr 0x13 = 0xF0218000  ; offset 0x03: EBC0_B3CR R/W Peripheral Bank 3 Configuration Register >dcr 0x012 = 0x04 >dcr 0x13 = 0x400DA000  ; offset 0x04: EBC0_B4CR R/W Peripheral Bank 4 Configuration Register >dcr 0x012 = 0x07 >dcr 0x13 = 0xF0318000  ; offset 0x07: EBC0_B7CR R/W Peripheral Bank 7 Configuration Register >dcr 0x012 = 0x10 >dcr 0x13 = 0x9B015480  ; offset 0x10: EBC0_B0AP R/W Peripheral Bank 0 Access Parameters >dcr 0x012 = 0x11 >dcr 0x13 = 0x02815480  ; offset 0x11: EBC0_B1AP R/W Peripheral Bank 1 Access Parameters >dcr 0x012 = 0x12 >dcr 0x13 = 0x04815A80  ; offset 0x12: EBC0_B2AP R/W Peripheral Bank 2 Access Parameters >dcr 0x012 = 0x13 >dcr 0x13 = 0x01815280  ; offset 0x13: EBC0_B3AP R/W Peripheral Bank 3 Access Parameters >dcr 0x012 = 0x14 >dcr 0x13 = 0x03800480  ; offset 0x14: EBC0_B4AP R/W Peripheral Bank 4 Access Parameters >dcr 0x012 = 0x17 >dcr 0x13 = 0x01815280  ; offset 0x17: EBC0_B7AP R/W Peripheral Bank 7 Access Parameters >word 0xEF400000 = 0x00000080  ; 0xEF400000: PCIL0_PMM0LA R/W PMM 0 Local Address >word 0xEF400004 = 0x010000E0  ; 0xEF400004: PCIL0_PMM0MA R/W PMM 0 Mask/Attribute >word 0xEF400008 = 0x00000080  ; 0xEF400008: PCIL0_PMM0PCILA R/W PMM 0 PCI Low Address >word 0xEF400014 = 0x010000E0  ; 0xEF400014: PCIL0_PMM1MA R/W PMM 1 Mask/Attribute >spr 0x009 = 0x00000000  ; CTR Count Register 9 0x009 0x120 Read/Write >spr 0x3FB = 0x80000001  ; ICCR Instruction Cache Cachability Register 1019 0x3FB 0x37F Read/Write >spr 0x3DB = 0x0001568B  ; PIT Programmable Interval Timer 987 0x3DB 0x37E Read/Write >spr 0x3B9 = 0x00000000  ; SGR Storage Guarded Register 953 0x3B9 0x33D Read/Write >spr 0x3DA = 0x04400000  ; TCR Timer Control Register 986 0x3DA 0x35E Read/Write }}}

* Download the ppcboot image to ram:


{{{ E:\src\ppc\ppcboot\ppcboot_ram.s19: downloaded 163100 bytes in 0 minutes, 22.785 seconds PC set to starting address 0x00400000 }}}

* Jump to the startup (which isn't the same as the download address):

>go 0x400100

At this point, you should have a running ppcboot v1.1.6. Install a new flash resident bootloader using the bootloader update procedure [:DHT-WalnutInstallingTheUpdatedBootloader:Installing the Updated Bootloader]

    1. page was renamed from AddJ10

suck or wick the solder out of the holes and solder it in, but be minded a common header has pins larger than holes, so ... be careful about what you do: you could damage the PCB


here it is the jtag pinout ||<tablewidth="200px">pin ||DHT-WALNUT ||AMCC-PPC4xx || ||1 ||TDO ||TDO || ||2 || || || ||3 ||TDI ||TDI || ||4 ||TRST ||TRST || ||5 ||*NC* ||*NC* || ||6 ||Vcc ||Vcc || ||7 ||TCK ||TCK || ||8 || ||CKSTP_IN || ||9 ||TMS ||TMS || ||10 || || || ||11 ||SRESET ||SRESET || ||12 || || || ||13 ||HRESET ||HRESET || ||14 || ||reserved || ||15 || ||CKSTP_OUT || ||16 ||gnd ||gnd ||

DHT-Walnut: JTAG Pin Out Connector Specifications for DHT-walnut-PPC405GP

AMCC-PPC4xx: JTAG Pin Out Connector Specifications for AMCC PPC 44X, 40X (4XX) Processors: 405EP, 405GP, 405GPR, 440GP, 440EP, 440GX, 440GR, 440EPX, 440GRX, 440SP, 440SPE

Pin Out description ||<tablewidth="200px">TDO ||JTAG Test Data Out || ||TDI ||JTAG Test Data In || ||TRST ||JTAG Test Reset || ||TCK || JTAG Test Clock || ||TMS ||JTAG Test Mode Select || ||*NC* ||not connected, used as cable reference || ||SRESET ||Soft-Reset || ||HRESET ||Hard-Reset || ||KSTP_OUT ||? || ||CKSTP_IN ||? || ||Vcc ||board ref voltage ||

About the jtag cable

the the "Wiggler Buffered JTAG Programmer" is compatible with the old OCD. This schematic has been tested and it is working.


NOTE (1) from http://www.macraigor.com/cpus.htm and you can download the OCD-commander, but it will not work with the wiggle 'cause in the new OCD-commander

- AMCC PowerPC PPC405 wiggler is NOT supported

- IBM PowerPC PPC 405 wiggler is NOT supported

you need to download this old version, that i tested with success


(it works under windows 98,NT,2000,xp)

(2) in case your lab is equipped with the bdi2000, you are warned this hw is known to be working with the dht-walnut jtag. In case you are not equipped with, you are warned this hardware is expensive a lot, 'cause it is not a simple download cable, it a professional debugger)

DHT-Walnut as N.A.S.


I turned a DHT-Walnut + 300Gb hard disk into a file server to have my data files connected and shared to the LAN (Local Area Network).

N.A.S. stands for Network Attached Storage. They are storage devices attached to the lan. A NAS should be able to be connected to every kind of network. It should use both the access protocols NFS (Network File System) and CIFS (Common Internet File System)

I only enabled NFS service in the kernel configure because i don't need CIFS. UNIX servers use NFS, while Microsoft systems use CIFS, fortunately i don't have any Microsoft systems here :P Gentoo is installed in the first little partition of the hard disk (it is PC-partition style, so you can only have 4 partitions). It runs openssh, telnet, ftp, tftp, and NFS. As the fact there is no RTC chip installed i added special /etc/init.d/clock-sync to set the local time. The scrips uses rdata to retrieve the current time of an other machine.

In the photo you could see the case i realized: the hard drive is connected to the opened door, the DHT-walnut PCD has been placed inside, the green LED has been used to the frontal case to say "the booting has been completed, the system is ready" (used the gpio hack provided in patches for the 2.6.16-rc3). The black platform is from sony playstation2 and is is only a nice way to have the case vertically seated.

Don't keep about the ALS4000 pci sound board plugged in the upper PCI bus. It has been plugged just to use the NAS as the giant (300Gb) ipod you have ever seen .... but this is an other story ....

DHT-Walnut as MP3-player

Following in the footsteps of Nate True, I turned a DHT-Walnut + parts into a server to play my music collection. It grabs the data via nfs from an NSLU2, and is controlled via various mpc-like clients from my desktops.

mpd server


After the above was running flawlessly for a day, somehow the usb audio device got fried. May have been a ground loop in the stereo. I had gotten used to having music playing. so I dug out an old PCI sound card (CS4280 based) and compiled the drivers and plugged it in. GIGO... seems like IBM4xx DMA support needs to be turned on in the kernel to make it work. Things are fine now with a few extra ground wires, just to be sure.

Note: to use a PCI-sound card you need to use ppcboot. U-boot-1.1.6 has an issue with kernel initialization. It is under fixing, but today it causes the DMA not to work correctly with the sound card. No sound at all.

[attachment:config.gz ]

[attachment:config.gz 2.6.16-pre3 configuration]