Debugging Makefiles

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Here is some information on debugging Makefiles:

showing symbol values, and showing file dependencies

There's a good Dr. Dobbs article on this topic, by John Graham-Cumming, at:

or printable, all-in-one page, at http://www.embedded.com/columns/technicalinsights/197003517?printable=true

This article describes some macros you can put in your Makefiles to show you the values of symbols, and to show the dependencies that led to a particular target being built. This is handy if you have a complex Makefile that you are trying to debug.

Makefile Debugger

John has also written a Makefile Debugger.

The following articles describe the debugger and how to use it:

The following resources are needed to use the debugger:

Expand the tarballs from these, and place __gmsl, gmsl and gmd in the directory with the Makefile you wish to debug.

Add the following lines to your Makefile:

include gdm

and

all:
        $(__BREAKPOINT)