Difference between revisions of "Embedded Open Modular Architecture/EOMA-26"
|Line 77:||Line 77:|
|* 26 GND
|* 26 GND
= GPIO Expansion =
= GPIO Expansion =
Revision as of 13:31, 20 July 2013
This page describes the specification of EOMA-26. The number of pins on the interface is 26; the physical form-factor is the 34x75x5mm ExpressCard format.
Re-purposing of the ExpressCard interface and form-factor has been chosen to create portable mass-volume (100 million units and above) ultra-low-cost Embedded Computing Modules (Computer on Module).
The interfaces are:
- 3-channel LVDS (covering up to 1280x800 @ 18-bit colour)
- RS232 UART (Tx and Rx only)
- 4-pin SD/MMC (which must automatically support 2-pin, 1-pin and SPI mode)
- 2 dedicated pins of General-purpose Digital I/O (GPIO) with a mandatory 8 further multiplexed GPIO (covering UART and SD/MMC)
These interfaces are NOT OPTIONAL for CPU Cards. All CPU Cards MUST provide all interfaces. I/O Boards on the other hand are free to implement whichever interfaces are required for the device. The only exception is I2C (due to the EOMA-26 identification EEPROM), which MUST be provided by all I/O Boards.
Exactly like ExpressCard Cards, EOMA-26 CPU Cards may have absolutely any functions, any additional connectors, peripherals and so on without limitation, except for compliance with the EOMA-26 pinouts and physical size constraints. These additional functions, which may include access ports in the casework, may extend outwards from the user-facing end of the CPU Card to any practical extent, exactly as with ExpressCard.
Target Market for EOMA-26
The target market for EOMA-26 is smaller or lower-cost devices than EOMA-68. Tablets and Laptops up to 11in in size in particular would ideally make use of EOMA-26. In essence, the EOMA-26 form-factor was designed to take advantage of the decreasing cost and increasingly-high specification of lower-end SoCs such as the A10S, AM3359  and so on.
Pinouts (version 1.0)
These pinouts make no attempt to be electronically or electrically compatible with ExpressCard. Power is deliberately placed on or received from different pins such that EOMA-26 CPU Cards do not power up when accidentally plugged into ExpressCard sockets, nor ExpressCards power up when accidentally plugged into EOMA-26 I/O Boards.
- Two Ground and two 5V pins are provided.
- Power is therefore limited to around 2.5 to 3.0 watts (note: heat is dissipated passively).
- USB and LVDS are balanced / differential pairs.
- The UART Tx and Rx lines can also be GPIO
- The SD/MMC's data lines 0 to 2 can also be GPIO
- As the GPIO pins can be reconfigured individually bi-directional for any digital purposes, they must be made to be 5 V TTL tolerant and tri-state isolated, and I/O boards also must be 5.0 V TTL tolerant as well as tri-state isolated. Levels when any GPIO pin is used either as an input or as an output should again operate at nominal 3.3 V TTL levels, thus expect "high" voltage of 2.0 volts, threshold of 1.4 V and "low" voltage of 0.8 V, but must accept voltages from 0–5 V.
Table of EOMA-26 pinouts
|Row 1||Row 2|
|* 1 GROUND||* 14 RIN 0- Negative LVDS differential data output|
|* 2 USB2-OTG (Data-)||* 15 RIN 1+ Positive LVDS differential data output|
|* 3 USB2-OTG (Data+)||* 16 RIN 1- Negative LVDS differential data output|
|* 4 PWR (5.0V)||* 17 RIN 2+ Positive LVDS differential data output|
|* 5 UART_TX / GPIO2||* 18 RIN 2- Negative LVDS differential data output|
|* 6 UART_RX / GPIO3||* 19 PWR (5.0V)|
|* 7 I2C Clock (SCL)||* 20 SDC-CMD / GPIO4|
|* 8 I2C Data (SDA)||* 21 SDC-CLK / GPIO5|
|* 9 GPIO0||* 22 SDC-3 / GPIO6|
|* 10 GPIO1||* 23 SDC-2 / GPIO7|
|* 11 CLKIN+ Positive LVDS differential clock output||* 24 SDC-1 / GPIO8|
|* 12 CLKIN- Negative LVDS differential clock output||* 25 SDC-0 / GPIO9|
|* 13 RIN 0+ Positive LVDS differential data output||* 26 GND|
I2C Identification EEPROM
The purpose of the Identification EEPROM is to unambiguously allow an EOMA-26 CPU Card to query an I/O Board and find out what the pins are being used for, and what ICs are available. In the case of EOMA-26 this includes setting some of the multiplexing, as well as potentially identifying GPIO Expansion or MCUs that are in use.
The main requirements in summary form is that the I2C bus must not be shared with any peripherals on the CPU Card, and the CPU Card must be able to read an on-board EEPROM (at address 0xA2).
- The I2C bus that is connected to the EOMA-26 interface will expect to have access to an EEPROM that is addressable (readable) at I2C address 0xA2.
- There also MUST NOT be a device on address 0xA3 (this is the EEPROM "write" address, used at factory-install time).
- Additionally, there MUST NOT be any devices on the I2C bus on the CPU Card side. The reason is that all other addresses (other than 0xA2 and 0xA3) must be available for peripherals on the I/O Board.
- If a CPU Card needs to use address 0xA2 or 0xA3, or any other address, then the CPU Card MUST use another I2C bus, NOT the one that is connected to the EOMA-26 Interface.
The severe limitations of 26 pins potentially necessitates an I/O board design approach which is already well-known: the use of GPIO Expander ICs on the main PCB. Examples include:
- The TI LM8330  which can do 8x12 keyboard matrices (up to 104-key keyboards) and has 3 PWMs (normally used to control brightness on LEDs on a keyboard or a backlight).
- The MAX7315  can be used in PWM mode if there is only one low-power LED required for a backlight.
- Toshiba has a range of GPIO Expander ICs  which include, in addition to I2C, an external IRQ line. This IC would be ideally suited to providing external IRQ lines for SD/MMC Card-Detect for example.
- Freescale's MC9RS08KA Embedded Controller range is ideally suited and ultra-low-cost
- NXP's PCF8574 is an ultra-low-cost 16-pin I2C-based GPIO Expander
- Holtek also have a superb 8-bit MCU product  which has 24-pins of programmable I/O, ADCs and PWMs.
Particular consideration needs to be given to the SD/MMC "Card-detect" and to USB-OTG "ID" GPIO functionality. No proscription is given as to how I/O Boards provide these functions. An I/O Board design may choose any of these options:
- To not provide SD/MMC "Card Detect" (i.e. expect the main CPU to do SD Card "polling") and to use one of the 2 dedicated GPIOs for USB-OTG "ID"
- To use both of the 2 dedicated GPIOs for both functions
- To flip the UART pins over to GPIO
- To use one of the above GPIO Expander ICs, connect the Expander's IRQ to one of the 2 dedicated GPIOs and to connect both "Card Detect" and "ID" to the Expander IC
- As above but to use a MCU (Embedded Controller) in the exact same role as a GPIO Expander IC.
These latter two options are best suited to when the I/O Board requires additional functionality such as PWM, ADC, DAC etc. All of these options are required to be described accurately in the I2C EEPROM.