Difference between revisions of "Embedded Open Modular Architecture/EOMA-52"
m (→Table of EOMA-52 pinouts) |
(→Table of EOMA-52 pinouts) |
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|- | |- | ||
|* 7 LCD Pixel Data bit 22 (Blue6) | |* 7 LCD Pixel Data bit 22 (Blue6) | ||
− | |* 8 LCD | + | |* 8 LCD Horizontal Synchronization |
|- | |- | ||
|* 9 LCD Pixel Data bit 8 (Green0) | |* 9 LCD Pixel Data bit 8 (Green0) | ||
Line 27: | Line 27: | ||
|- | |- | ||
|* 15 LCD Pixel Data bit 14 (Green6) | |* 15 LCD Pixel Data bit 14 (Green6) | ||
− | |* 16 LCD | + | |* 16 LCD Vertical Synchronization |
|- | |- | ||
|* 17 LCD Pixel Data bit 0 (Red0) | |* 17 LCD Pixel Data bit 0 (Red0) | ||
Line 39: | Line 39: | ||
|- | |- | ||
|* 23 LCD Pixel Data bit 6 (Red6) | |* 23 LCD Pixel Data bit 6 (Red6) | ||
− | |* 24 LCD Pixel | + | |* 24 LCD Pixel Clock |
|- | |- | ||
− | |* 25 LCD Pixel | + | |* 25 LCD Pixel data enable (TFT) output |
− | |* 26 | + | |* 26 UART_TX |
|- | |- | ||
− | |* 27 | + | |* 27 |
− | |* 28 | + | |* 28 UART_RX |
|- | |- | ||
− | |* 29 | + | |* 29 |
− | |* 30 I2C | + | |* 30 I2C Clock (SCL) |
|- | |- | ||
− | |* 31 | + | |* 31 |
− | |* 32 | + | |* 32 I2C Data (SDA) |
|- | |- | ||
− | |* 33 | + | |* 33 |
− | |* 34 | + | |* 34 Reserved/Available for Card-specific purposes |
|- | |- | ||
− | |* 35 GPIO ( | + | |* 35 GPIO (0) |
|* 36 USB2 (Data+) GPIO (5) | |* 36 USB2 (Data+) GPIO (5) | ||
|- | |- | ||
− | |* 37 GPIO ( | + | |* 37 GPIO (1) |
− | |* 38 USB2 (Data+ | + | |* 38 USB2 (Data+) |
|- | |- | ||
− | |* 39 | + | |* 39 GPIO (2) |
|* 40 GND | |* 40 GND | ||
|- | |- | ||
− | |* 41 | + | |* 41 GPIO (3) |
|* 42 SDC-CLK | |* 42 SDC-CLK | ||
|- | |- | ||
− | |* 43 | + | |* 43 GPIO (4) |
|* 44 SDC-CMD | |* 44 SDC-CMD | ||
|- | |- | ||
− | |* 45 | + | |* 45 GPIO (5) |
|* 46 SDC-D0 | |* 46 SDC-D0 | ||
|- | |- | ||
− | |* 47 | + | |* 47 GPIO (6) |
|* 48 SDC-D1 | |* 48 SDC-D1 | ||
|- | |- | ||
− | |* 49 | + | |* 49 GPIO (7) |
|* 50 SDC-D2 | |* 50 SDC-D2 | ||
|- | |- | ||
− | |* 51 | + | |* 51 PWR (5.0 V) |
|* 52 SDC-D3 | |* 52 SDC-D3 | ||
|} | |} |
Revision as of 10:11, 21 December 2013
Table of EOMA-52 pinouts
Row 1 | Row 2 |
---|---|
* 1 LCD Pixel Data bit 16 (Blue0) | * 2 LCD Pixel Data bit 17 (Blue1) |
* 3 LCD Pixel Data bit 18 (Blue2) | * 4 LCD Pixel Data bit 19 (Blue3) |
* 5 LCD Pixel Data bit 20 (Blue4) | * 6 LCD Pixel Data bit 21 (Blue5) |
* 7 LCD Pixel Data bit 22 (Blue6) | * 8 LCD Horizontal Synchronization |
* 9 LCD Pixel Data bit 8 (Green0) | * 10 LCD Pixel Data bit 9 (Green1) |
* 11 LCD Pixel Data bit 10 (Green2) | * 12 LCD Pixel Data bit 11 (Green3) |
* 13 LCD Pixel Data bit 12 (Green4) | * 14 LCD Pixel Data bit 13 (Green5) |
* 15 LCD Pixel Data bit 14 (Green6) | * 16 LCD Vertical Synchronization |
* 17 LCD Pixel Data bit 0 (Red0) | * 18 LCD Pixel Data bit 1 (Red1) |
* 19 LCD Pixel Data bit 2 (Red2) | * 20 LCD Pixel Data bit 3 (Red3) |
* 21 LCD Pixel Data bit 4 (Red4) | * 22 LCD Pixel Data bit 5 (Red5) |
* 23 LCD Pixel Data bit 6 (Red6) | * 24 LCD Pixel Clock |
* 25 LCD Pixel data enable (TFT) output | * 26 UART_TX |
* 27 | * 28 UART_RX |
* 29 | * 30 I2C Clock (SCL) |
* 31 | * 32 I2C Data (SDA) |
* 33 | * 34 Reserved/Available for Card-specific purposes |
* 35 GPIO (0) | * 36 USB2 (Data+) GPIO (5) |
* 37 GPIO (1) | * 38 USB2 (Data+) |
* 39 GPIO (2) | * 40 GND |
* 41 GPIO (3) | * 42 SDC-CLK |
* 43 GPIO (4) | * 44 SDC-CMD |
* 45 GPIO (5) | * 46 SDC-D0 |
* 47 GPIO (6) | * 48 SDC-D1 |
* 49 GPIO (7) | * 50 SDC-D2 |
* 51 PWR (5.0 V) | * 52 SDC-D3 |