Difference between revisions of "Embedded Open Modular Architecture/EOMA-52"
m (→Table of EOMA-52 pinouts) |
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|* 22 LCD Pixel data enable (TFT) output | |* 22 LCD Pixel data enable (TFT) output | ||
|- | |- | ||
− | |* 23 | + | |* 23 POWER_ON# |
|* 24 Reserved/Available for Card-specific purposes | |* 24 Reserved/Available for Card-specific purposes | ||
|- | |- | ||
Line 56: | Line 56: | ||
|* 34 GND | |* 34 GND | ||
|- | |- | ||
− | |* 35 GPIO (0) | + | |* 35 GPIO (0) / EINT0 |
|* 36 USB2 (Data+) | |* 36 USB2 (Data+) | ||
|- | |- | ||
− | |* 37 | + | |* 37 GPIO (1) |
|* 38 USB2 (Data+) | |* 38 USB2 (Data+) | ||
|- | |- | ||
− | |* 39 | + | |* 39 GPIO (2) |
|* 40 GND | |* 40 GND | ||
|- | |- | ||
− | |* 41 | + | |* 41 GPIO (3) |
− | |* 42 | + | |* 42 GPIO (8) / PWM0 |
|- | |- | ||
− | |* 43 | + | |* 43 GPIO (4) |
− | |* 44 | + | |* 44 PWR (5.0 V) |
|- | |- | ||
− | |* 45 | + | |* 45 GPIO (5) |
− | |* 46 | + | |* 46 PWR (5.0 V) |
|- | |- | ||
− | |* 47 | + | |* 47 SDC-D1 / GPIO (6) |
− | |* 48 SDC- | + | |* 48 SDC-D3 / SPI_CS0 |
|- | |- | ||
− | |* 49 | + | |* 49 SDC-D2 / GPIO (7) |
− | |* 50 SDC- | + | |* 50 SDC-D0 / SPI_MISO |
|- | |- | ||
− | |* 51 | + | |* 51 SDC-CLK / SPI_CLK |
− | |* 52 SDC- | + | |* 52 SDC-CMD / SPI_MOSI |
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Latest revision as of 10:40, 21 December 2013
Table of EOMA-52 pinouts
Row 1 | Row 2 |
---|---|
* 1 LCD Pixel Data bit 16 (Blue0) | * 2 LCD Pixel Data bit 17 (Blue1) |
* 3 LCD Pixel Data bit 18 (Blue2) | * 4 LCD Pixel Data bit 19 (Blue3) |
* 5 LCD Pixel Data bit 20 (Blue4) | * 6 LCD Pixel Data bit 21 (Blue5) |
* 7 LCD Pixel Data bit 8 (Green0) | * 8 LCD Pixel Data bit 9 (Green1) |
* 9 LCD Pixel Data bit 10 (Green2) | * 10 LCD Pixel Data bit 11 (Green3) |
* 11 LCD Pixel Data bit 12 (Green4) | * 12 LCD Pixel Data bit 13 (Green5) |
* 13 LCD Pixel Data bit 0 (Red0) | * 14 LCD Pixel Data bit 1 (Red1) |
* 15 LCD Pixel Data bit 2 (Red2) | * 16 LCD Pixel Data bit 3 (Red3) |
* 17 LCD Pixel Data bit 4 (Red4) | * 18 LCD Pixel Data bit 5 (Red5) |
* 19 LCD Vertical Synchronization | * 20 LCD Horizontal Synchronization |
* 21 LCD Pixel Clock | * 22 LCD Pixel data enable (TFT) output |
* 23 POWER_ON# | * 24 Reserved/Available for Card-specific purposes |
* 25 I2S_MCLK | * 26 UART_TX |
* 27 I2S_BCLK | * 28 UART_RX |
* 29 I2S_LRCK | * 30 I2C Clock (SCL) |
* 31 I2S_DO | * 32 I2C Data (SDA) |
* 33 I2S_DI | * 34 GND |
* 35 GPIO (0) / EINT0 | * 36 USB2 (Data+) |
* 37 GPIO (1) | * 38 USB2 (Data+) |
* 39 GPIO (2) | * 40 GND |
* 41 GPIO (3) | * 42 GPIO (8) / PWM0 |
* 43 GPIO (4) | * 44 PWR (5.0 V) |
* 45 GPIO (5) | * 46 PWR (5.0 V) |
* 47 SDC-D1 / GPIO (6) | * 48 SDC-D3 / SPI_CS0 |
* 49 SDC-D2 / GPIO (7) | * 50 SDC-D0 / SPI_MISO |
* 51 SDC-CLK / SPI_CLK | * 52 SDC-CMD / SPI_MOSI |