|
|
(2 intermediate revisions by 2 users not shown) |
Line 1: |
Line 1: |
| | | |
− |
| |
− | = new-firmware =
| |
− |
| |
− | uboot-2009
| |
− |
| |
− | == no working ide, dht-walnut ==
| |
− |
| |
− |
| |
− | <pre>
| |
− |
| |
− | U-Boot 2009.06-00298-g3672cd5-dirty (Jul 13 2009 - 19:05:51)
| |
− |
| |
− | CPU: AMCC PowerPC 405GP Rev. E at 266.640 MHz (PLB=66, OPB=33, EBC=33 MHz)
| |
− | Internal PCI arbiter enabled, PCI async ext clock used
| |
− | 16 kB I-Cache 8 kB D-Cache
| |
− | Board: DHT Walnut - IBM PPC405GP Board
| |
− | I2C: ready
| |
− | DRAM: 32 MB
| |
− | FLASH: 512 kB
| |
− | PCI: Bus Dev VenId DevId Class Int
| |
− | 00 04 105a 0d30 0101 1d
| |
− | Net: ppc_4xx_eth0
| |
− | IDE: Bus 0: ............................................................** Timeout **
| |
− |
| |
− | => help ide
| |
− | ide - IDE sub-system
| |
− |
| |
− | Usage:
| |
− | ide reset - reset IDE controller
| |
− | ide info - show available IDE devices
| |
− | ide device [dev] - show or set current device
| |
− | ide part [dev] - print partition table of one or all IDE devices
| |
− | ide read addr blk# cnt
| |
− | ide write addr blk# cnt - read/write `cnt' blocks starting at block `blk#'
| |
− | to/from memory address `addr'
| |
− |
| |
− | => ide info
| |
− |
| |
− | IDE device 0: device type unknown
| |
− | IDE device 1: device type unknown
| |
− | => pci
| |
− | Scanning PCI devices on bus 0
| |
− | BusDevFun VendorId DeviceId Device Class Sub-Class
| |
− | _____________________________________________________________
| |
− | 00.00.00 0x1014 0x0156 Bridge device 0x00
| |
− | 00.04.00 0x105a 0x0d30 Mass storage controller 0x01
| |
− | => help pci
| |
− | pci - list and access PCI Configuration Space
| |
− |
| |
− | Usage:
| |
− | pci [bus] [long]
| |
− | - short or long list of PCI devices on bus 'bus'
| |
− | pci header b.d.f
| |
− | - show header of PCI device 'bus.device.function'
| |
− | pci display[.b, .w, .l] b.d.f [address] [# of objects]
| |
− | - display PCI configuration space (CFG)
| |
− | pci next[.b, .w, .l] b.d.f address
| |
− | - modify, read and keep CFG address
| |
− | pci modify[.b, .w, .l] b.d.f address
| |
− | - modify, auto increment CFG address
| |
− | pci write[.b, .w, .l] b.d.f address value
| |
− | - write to CFG address
| |
− | => pci header 00.04.00
| |
− | vendor ID = 0x105a
| |
− | device ID = 0x0d30
| |
− | command register = 0x0004
| |
− | status register = 0x0210
| |
− | revision ID = 0x02
| |
− | class code = 0x01 (Mass storage controller)
| |
− | sub class code = 0x01
| |
− | programming interface = 0x8a
| |
− | cache line = 0x00
| |
− | latency time = 0x40
| |
− | header type = 0x00
| |
− | BIST = 0x00
| |
− | base address 0 = 0x00000000
| |
− | base address 1 = 0x00000000
| |
− | base address 2 = 0x00000000
| |
− | base address 3 = 0x00000000
| |
− | base address 4 = 0x00006801
| |
− | base address 5 = 0x00000000
| |
− | cardBus CIS pointer = 0x00000000
| |
− | sub system vendor ID = 0x105a
| |
− | sub system ID = 0x4d33
| |
− | expansion ROM base address = 0x000dc000
| |
− | interrupt line = 0x1d
| |
− | interrupt pin = 0x01
| |
− | min Grant = 0x00
| |
− | max Latency = 0x00
| |
− | => pci display 00.04.00
| |
− | 00000000: 0d30105a 02100004 01018a02 00004000
| |
− | 00000010: 00000000 00000000 00000000 00000000
| |
− | 00000020: 00006801 00000000 00000000 4d33105a
| |
− | 00000030: 000dc000 00000058 00000000 0000011d
| |
− | => pci lo� �ong
| |
− | Scanning PCI devices on bus 0
| |
− |
| |
− | Found PCI device 00.00.00:
| |
− | vendor ID = 0x1014
| |
− | device ID = 0x0156
| |
− | command register = 0x0006
| |
− | status register = 0x2210
| |
− | revision ID = 0x01
| |
− | class code = 0x06 (Bridge device)
| |
− | sub class code = 0x00
| |
− | programming interface = 0x00
| |
− | cache line = 0x00
| |
− | latency time = 0x07
| |
− | header type = 0x00
| |
− | BIST = 0x00
| |
− | base address 0 = 0x00000000
| |
− | base address 1 = 0x00000008
| |
− | base address 2 = 0x00000000
| |
− | base address 3 = 0x00000000
| |
− | base address 4 = 0x00000000
| |
− | base address 5 = 0x00000000
| |
− | cardBus CIS pointer = 0x00000000
| |
− | sub system vendor ID = 0x10e8
| |
− | sub system ID = 0xcafe
| |
− | expansion ROM base address = 0x00000000
| |
− | interrupt line = 0x00
| |
− | interrupt pin = 0x01
| |
− | min Grant = 0x00
| |
− | max Latency = 0x00
| |
− |
| |
− | Found PCI device 00.04.00:
| |
− | vendor ID = 0x105a
| |
− | device ID = 0x0d30
| |
− | command register = 0x0004
| |
− | status register = 0x0210
| |
− | revision ID = 0x02
| |
− | class code = 0x01 (Mass storage controller)
| |
− | sub class code = 0x01
| |
− | programming interface = 0x8a
| |
− | cache line = 0x00
| |
− | latency time = 0x40
| |
− | header type = 0x00
| |
− | BIST = 0x00
| |
− | base address 0 = 0x00000000
| |
− | base address 1 = 0x00000000
| |
− | base address 2 = 0x00000000
| |
− | base address 3 = 0x00000000
| |
− | base address 4 = 0x00006801
| |
− | base address 5 = 0x00000000
| |
− | cardBus CIS pointer = 0x00000000
| |
− | sub system vendor ID = 0x105a
| |
− | sub system ID = 0x4d33
| |
− | expansion ROM base address = 0x000dc000
| |
− | interrupt line = 0x1d
| |
− | interrupt pin = 0x01
| |
− | min Grant = 0x00
| |
− | max Latency = 0x00
| |
− | => ide
| |
− | ide - IDE sub-system
| |
− |
| |
− | Usage:
| |
− | ide reset - reset IDE controller
| |
− | ide info - show available IDE devices
| |
− | ide device [dev] - show or set current device
| |
− | ide part [dev] - print partition table of one or all IDE devices
| |
− | ide read addr blk# cnt
| |
− | ide write addr blk# cnt - read/write `cnt' blocks starting at block `blk#'
| |
− | to/from memory address `addr'
| |
− | => ide reset
| |
− |
| |
− | Reset IDE: Bus 0: ............................................................** Timeout **
| |
− |
| |
− | </pre>
| |
− |
| |
− | == working ide, dht-walnut ==
| |
− |
| |
− | <pre>
| |
− |
| |
− | U-Boot 1.2.0-g7882751c-dirty (Apr 14 2007 - 16:44:37)
| |
− |
| |
− | CPU: AMCC PowerPC 405GP Rev. E at 266.640 MHz (PLB=66, OPB=33, EBC=33 MHz)
| |
− | Internal PCI arbiter enabled, PCI async ext clock used
| |
− | 16 kB I-Cache 8 kB D-Cache
| |
− | Board: Walnut - AMCC PPC405GP Evaluation Board
| |
− | I2C: ready
| |
− | DRAM: 32 MB
| |
− | FLASH: 512 kB
| |
− | PCI: Bus Dev VenId DevId Class Int
| |
− | 00 04 105a 0d30 0101 1d
| |
− | In: serial
| |
− | Out: serial
| |
− | Err: serial
| |
− | Net: ppc_4xx_eth0
| |
− | IDE: Bus 0: OK
| |
− | Device 0: not available
| |
− | Device 1: not available
| |
− | "ide.part.1th stores kernel rawimage"
| |
− | Hit any key to stop autoboot: 5..0
| |
− | => pci
| |
− | Scanning PCI devices on bus 0
| |
− | BusDevFun VendorId DeviceId Device Class Sub-Class
| |
− | _____________________________________________________________
| |
− | 00.00.00 0x1014 0x0156 Bridge device 0x00
| |
− | 00.04.00 0x105a 0x0d30 Mass storage controller 0x01
| |
− |
| |
− | => help pci
| |
− | pci [bus] [long]
| |
− | - short or long list of PCI devices on bus 'bus'
| |
− | pci header b.d.f
| |
− | - show header of PCI device 'bus.device.function'
| |
− | pci display[.b, .w, .l] b.d.f [address] [# of objects]
| |
− | - display PCI configuration space (CFG)
| |
− | pci next[.b, .w, .l] b.d.f address
| |
− | - modify, read and keep CFG address
| |
− | pci modify[.b, .w, .l] b.d.f address
| |
− | - modify, auto increment CFG address
| |
− | pci write[.b, .w, .l] b.d.f address value
| |
− | - write to CFG address
| |
− |
| |
− | => pci long
| |
− | Scanning PCI devices on bus 0
| |
− |
| |
− | Found PCI device 00.00.00:
| |
− | vendor ID = 0x1014
| |
− | device ID = 0x0156
| |
− | command register = 0x0006
| |
− | status register = 0x2210
| |
− | revision ID = 0x01
| |
− | class code = 0x06 (Bridge device)
| |
− | sub class code = 0x00
| |
− | programming interface = 0x00
| |
− | cache line = 0x00
| |
− | latency time = 0x07
| |
− | header type = 0x00
| |
− | BIST = 0x00
| |
− | base address 0 = 0x00000000
| |
− | base address 1 = 0x00000008
| |
− | base address 2 = 0x00000000
| |
− | base address 3 = 0x00000000
| |
− | base address 4 = 0x00000000
| |
− | base address 5 = 0x00000000
| |
− | cardBus CIS pointer = 0x00000000
| |
− | sub system vendor ID = 0x10e8
| |
− | sub system ID = 0xcafe
| |
− | expansion ROM base address = 0x00000000
| |
− | interrupt line = 0x00
| |
− | interrupt pin = 0x01
| |
− | min Grant = 0x00
| |
− | max Latency = 0x00
| |
− |
| |
− | Found PCI device 00.04.00:
| |
− | vendor ID = 0x105a
| |
− | device ID = 0x0d30
| |
− | command register = 0x0007
| |
− | status register = 0x0210
| |
− | revision ID = 0x02
| |
− | class code = 0x01 (Mass storage controller)
| |
− | sub class code = 0x01
| |
− | programming interface = 0x8a
| |
− | cache line = 0x00
| |
− | latency time = 0x80
| |
− | header type = 0x00
| |
− | BIST = 0x00
| |
− | base address 0 = 0x00000000
| |
− | base address 1 = 0x00000000
| |
− | base address 2 = 0x00000000
| |
− | base address 3 = 0x00000000
| |
− | base address 4 = 0x00800001
| |
− | base address 5 = 0x80000000
| |
− | cardBus CIS pointer = 0x00000000
| |
− | sub system vendor ID = 0x105a
| |
− | sub system ID = 0x4d33
| |
− | expansion ROM base address = 0x000dc000
| |
− | interrupt line = 0x1d
| |
− | interrupt pin = 0x01
| |
− | min Grant = 0x00
| |
− | max Latency = 0x00
| |
− |
| |
− | => pci header 00.04.00
| |
− | vendor ID = 0x105a
| |
− | device ID = 0x0d30
| |
− | command register = 0x0007
| |
− | status register = 0x0210
| |
− | revision ID = 0x02
| |
− | class code = 0x01 (Mass storage controller)
| |
− | sub class code = 0x01
| |
− | programming interface = 0x8a
| |
− | cache line = 0x00
| |
− | latency time = 0x80
| |
− | header type = 0x00
| |
− | BIST = 0x00
| |
− | base address 0 = 0x00000000
| |
− | base address 1 = 0x00000000
| |
− | base address 2 = 0x00000000
| |
− | base address 3 = 0x00000000
| |
− | base address 4 = 0x00800001
| |
− | base address 5 = 0x80000000
| |
− | cardBus CIS pointer = 0x00000000
| |
− | sub system vendor ID = 0x105a
| |
− | sub system ID = 0x4d33
| |
− | expansion ROM base address = 0x000dc000
| |
− | interrupt line = 0x1d
| |
− | interrupt pin = 0x01
| |
− | min Grant = 0x00
| |
− | max Latency = 0x00
| |
− | => pci display 00.04.00
| |
− | 00000000: 0d30105a 02100007 01018a02 00008000
| |
− | 00000010: 00000000 00000000 00000000 00000000
| |
− | 00000020: 00800001 80000000 00000000 4d33105a
| |
− | 00000030: 000dc000 00000058 00000000 0000011d
| |
− | =>
| |
− | 00000000: 0d30105a 02100007 01018a02 00008000
| |
− | 00000010: 00000000 00000000 00000000 00000000
| |
− | 00000020: 00800001 80000000 00000000 4d33105a
| |
− | 00000030: 000dc000 00000058 00000000 0000011d
| |
− | =>
| |
− | 00000000: 0d30105a 02100007 01018a02 00008000
| |
− | 00000010: 00000000 00000000 00000000 00000000
| |
− | 00000020: 00800001 80000000 00000000 4d33105a
| |
− | 00000030: 000dc000 00000058 00000000 0000011d
| |
− | </pre>
| |
− |
| |
− |
| |
− |
| |
− |
| |
− |
| |
− | == uboot-2009/include/walnut.h hacked ==
| |
− |
| |
− | what is wrong about ide ?
| |
− |
| |
− | <pre>
| |
− | /*
| |
− | * board/config.h - configuration options, board specific
| |
− | */
| |
− |
| |
− | // L0
| |
− | #ifndef __CONFIG_H
| |
− | #define __CONFIG_H
| |
− |
| |
− | /*
| |
− | * High Level Configuration Options
| |
− | * (easy to change)
| |
− | */
| |
− |
| |
− | #define CONFIG_405GP 1 /* This is a PPC405 CPU */
| |
− | #define CONFIG_4xx 1 /* ...member of PPC4xx family */
| |
− | #define CONFIG_WALNUT 1 /* ...on a WALNUT board */
| |
− | /* ...and on a SYCAMORE board */
| |
− | #define CONFIG_DHT_WALNUT 1 /* ...dht-walnut board */
| |
− |
| |
− | /*
| |
− | * Include common defines/options for all AMCC eval boards
| |
− | */
| |
− | #define CONFIG_HOSTNAME walnut
| |
− | #include "amcc-common.h"
| |
− |
| |
− | #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
| |
− |
| |
− | #define CONFIG_SYS_CLK_FREQ 33333333 /* external frequency to pll */
| |
− |
| |
− | /*
| |
− | * Default environment variables
| |
− | */
| |
− | #define CONFIG_EXTRA_ENV_SETTINGS \
| |
− | CONFIG_AMCC_DEF_ENV \
| |
− | CONFIG_AMCC_DEF_ENV_POWERPC \
| |
− | CONFIG_AMCC_DEF_ENV_PPC_OLD \
| |
− | CONFIG_AMCC_DEF_ENV_NOR_UPD \
| |
− | "kernel_addr=fff80000\0" \
| |
− | "ramdisk_addr=fff80000\0" \
| |
− | ""
| |
− | // ------------------------------------------------------------------------
| |
− | //L1
| |
− | #ifdef CONFIG_DHT_WALNUT
| |
− | #define CONFIG_ETHADDR de:ad:be:ef:00:00
| |
− | #define CONFIG_ENV_OVERWRITE 1
| |
− | #define CONFIG_PHY_ADDR 9 /* PHY address */
| |
− | #else
| |
− | #define CONFIG_PHY_ADDR 1 /* PHY address */
| |
− | #endif
| |
− | //L1
| |
− | #define CONFIG_HAS_ETH0 1
| |
− |
| |
− | #define CONFIG_RTC_DS174x 1 /* use DS1743 RTC in Walnut */
| |
− |
| |
− | /*
| |
− | * Commands additional to the ones defined in amcc-common.h
| |
− | */
| |
− | #define CONFIG_CMD_DATE
| |
− | #define CONFIG_CMD_PCI
| |
− | #define CONFIG_CMD_SDRAM
| |
− | #define CONFIG_CMD_SNTP
| |
− | // specific for dht walnut
| |
− | //L2
| |
− | #ifdef CONFIG_DHT_WALNUT
| |
− | #define CONFIG_CMD_IDE
| |
− | //#define CONFIG_MAC_PARTITION
| |
− | #define CONFIG_DOS_PARTITION
| |
− | //#define CONFIG_CMD_JFFS2
| |
− | #define CONFIG_CMD_EXT2
| |
− | #define CONFIG_CMD_VFAT
| |
− | //L2
| |
− | #endif
| |
− | // -----------------------
| |
− |
| |
− |
| |
− | #define CONFIG_SPD_EEPROM 1 /* use SPD EEPROM for setup */
| |
− |
| |
− | /*
| |
− | * If CONFIG_SYS_EXT_SERIAL_CLOCK, then the UART divisor is 1.
| |
− | * If CONFIG_SYS_405_UART_ERRATA_59, then UART divisor is 31.
| |
− | * Otherwise, UART divisor is determined by CPU Clock and CONFIG_SYS_BASE_BAUD value.
| |
− | * The BASE_BAUD define should match this configuration.
| |
− | * baseBaud = cpuClock/(uartDivisor*16)
| |
− | * If CONFIG_SYS_405_UART_ERRATA_59 and 200MHz CPU clock,
| |
− | * set Linux BASE_BAUD to 403200.
| |
− | */
| |
− | #undef CONFIG_SERIAL_SOFTWARE_FIFO
| |
− | #undef CONFIG_SYS_EXT_SERIAL_CLOCK /* external serial clock */
| |
− | #undef CONFIG_SYS_405_UART_ERRATA_59 /* 405GP/CR Rev. D silicon */
| |
− | #define CONFIG_SYS_BASE_BAUD 691200
| |
− |
| |
− |
| |
− | /*-----------------------------------------------------------------------
| |
− | * dht-walnut uart
| |
− | *-----------------------------------------------------------------------
| |
− | */
| |
− | // L3
| |
− | #ifdef CONFIG_DHT_WALNUT
| |
− | #undef CONFIG_BAUDRATE
| |
− | #define CONFIG_BAUDRATE 9600 /* dht-walnut uart */
| |
− | // L3
| |
− | #endif
| |
− |
| |
− |
| |
− | /*-----------------------------------------------------------------------
| |
− | * I2C stuff
| |
− | *-----------------------------------------------------------------------
| |
− | */
| |
− | #define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
| |
− |
| |
− | #define CONFIG_SYS_I2C_MULTI_EEPROMS
| |
− | #define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1)
| |
− | #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
| |
− | #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
| |
− | #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
| |
− |
| |
− | /*-----------------------------------------------------------------------
| |
− | * PCI stuff
| |
− | *-----------------------------------------------------------------------
| |
− | */
| |
− | #define PCI_HOST_ADAPTER 0 /* configure ar pci adapter */
| |
− | #define PCI_HOST_FORCE 1 /* configure as pci host */
| |
− | #define PCI_HOST_AUTO 2 /* detected via arbiter enable */
| |
− |
| |
− | #define CONFIG_PCI /* include pci support */
| |
− | #define CONFIG_PCI_HOST PCI_HOST_FORCE /* select pci host function */
| |
− | #define CONFIG_PCI_PNP /* do pci plug-and-play */
| |
− | /* resource configuration */
| |
− | #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
| |
− |
| |
− | #define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x10e8 /* AMCC */
| |
− | #define CONFIG_SYS_PCI_SUBSYS_DEVICEID 0xcafe /* Whatever */
| |
− | #define CONFIG_SYS_PCI_PTM1LA 0x00000000 /* point to sdram */
| |
− | #define CONFIG_SYS_PCI_PTM1MS 0x80000001 /* 2GB, enable hard-wired to 1 */
| |
− | #define CONFIG_SYS_PCI_PTM1PCI 0x00000000 /* Host: use this pci address */
| |
− | #define CONFIG_SYS_PCI_PTM2LA 0x00000000 /* disabled */
| |
− | #define CONFIG_SYS_PCI_PTM2MS 0x00000000 /* disabled */
| |
− | #define CONFIG_SYS_PCI_PTM2PCI 0x04000000 /* Host: use this pci address */
| |
− |
| |
− | /*-----------------------------------------------------------------------
| |
− | * Start addresses for the final memory configuration
| |
− | * (Set up by the startup code)
| |
− | */
| |
− | #define CONFIG_SYS_FLASH_BASE 0xFFF80000
| |
− |
| |
− | /*
| |
− | * Define here the location of the environment variables (FLASH or NVRAM).
| |
− | * Note: DENX encourages to use redundant environment in FLASH. NVRAM is only
| |
− | * supported for backward compatibility.
| |
− | */
| |
− | #if 1
| |
− | #define CONFIG_ENV_IS_IN_FLASH 1 /* use FLASH for environment vars */
| |
− | #else
| |
− | #define CONFIG_ENV_IS_IN_NVRAM 1 /* use NVRAM for environment vars */
| |
− | #endif
| |
− |
| |
− | /*-----------------------------------------------------------------------
| |
− | * FLASH organization
| |
− | */
| |
− | #define FLASH_BASE0_PRELIM CONFIG_SYS_FLASH_BASE /* FLASH bank #0 */
| |
− | #define FLASH_BASE1_PRELIM 0 /* FLASH bank #1 */
| |
− |
| |
− | #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
| |
− | #define CONFIG_SYS_MAX_FLASH_SECT 256 /* max number of sectors on one chip */
| |
− |
| |
− | #define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
| |
− | #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
| |
− |
| |
− | #define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
| |
− |
| |
− | #define CONFIG_SYS_FLASH_ADDR0 0x5555
| |
− | #define CONFIG_SYS_FLASH_ADDR1 0x2aaa
| |
− | #define CONFIG_SYS_FLASH_WORD_SIZE unsigned char
| |
− |
| |
− | #ifdef CONFIG_ENV_IS_IN_FLASH
| |
− | #define CONFIG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */
| |
− | #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE-CONFIG_ENV_SECT_SIZE)
| |
− | #define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */
| |
− |
| |
− | /* Address and size of Redundant Environment Sector */
| |
− | #define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR-CONFIG_ENV_SECT_SIZE)
| |
− | #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
| |
− | #endif /* CONFIG_ENV_IS_IN_FLASH */
| |
− |
| |
− | /*-----------------------------------------------------------------------
| |
− | * NVRAM organization
| |
− | */
| |
− | #define CONFIG_SYS_NVRAM_BASE_ADDR 0xf0000000 /* NVRAM base address */
| |
− | #define CONFIG_SYS_NVRAM_SIZE 0x1ff8 /* NVRAM size */
| |
− |
| |
− | #ifdef CONFIG_ENV_IS_IN_NVRAM
| |
− | #define CONFIG_ENV_SIZE 0x1000 /* Size of Environment vars */
| |
− | #define CONFIG_ENV_ADDR \
| |
− | (CONFIG_SYS_NVRAM_BASE_ADDR+CONFIG_SYS_NVRAM_SIZE-CONFIG_ENV_SIZE) /* Env */
| |
− | #endif
| |
− |
| |
− | /*-----------------------------------------------------------------------
| |
− | * External Bus Controller (EBC) Setup
| |
− | */
| |
− |
| |
− | /* Memory Bank 0 (Flash Bank 0) initialization */
| |
− | #define CONFIG_SYS_EBC_PB0AP 0x9B015480
| |
− | #define CONFIG_SYS_EBC_PB0CR 0xFFF18000 /* BAS=0xFFF,BS=1MB,BU=R/W,BW=8bit */
| |
− |
| |
− | #define CONFIG_SYS_EBC_PB1AP 0x02815480
| |
− | #define CONFIG_SYS_EBC_PB1CR 0xF0018000 /* BAS=0xF00,BS=1MB,BU=R/W,BW=8bit */
| |
− |
| |
− | #define CONFIG_SYS_EBC_PB2AP 0x04815A80
| |
− | #define CONFIG_SYS_EBC_PB2CR 0xF0118000 /* BAS=0xF01,BS=1MB,BU=R/W,BW=8bit */
| |
− |
| |
− | #define CONFIG_SYS_EBC_PB3AP 0x01815280
| |
− | #define CONFIG_SYS_EBC_PB3CR 0xF0218000 /* BAS=0xF02,BS=1MB,BU=R/W,BW=8bit */
| |
− |
| |
− | #define CONFIG_SYS_EBC_PB7AP 0x01815280
| |
− | #define CONFIG_SYS_EBC_PB7CR 0xF0318000 /* BAS=0xF03,BS=1MB,BU=R/W,BW=8bit */
| |
− |
| |
− | /*-----------------------------------------------------------------------
| |
− | * External peripheral base address
| |
− | *-----------------------------------------------------------------------
| |
− | */
| |
− | #define CONFIG_SYS_KEY_REG_BASE_ADDR 0xF0100000
| |
− | #define CONFIG_SYS_IR_REG_BASE_ADDR 0xF0200000
| |
− | #define CONFIG_SYS_FPGA_REG_BASE_ADDR 0xF0300000
| |
− |
| |
− | /*-----------------------------------------------------------------------
| |
− | * Definitions for initial stack pointer and data area
| |
− | */
| |
− | #define CONFIG_SYS_INIT_DCACHE_CS 4 /* use cs # 4 for data cache memory */
| |
− |
| |
− | #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 /* inside of SDRAM */
| |
− | #define CONFIG_SYS_INIT_RAM_END 0x2000 /* End of used area in RAM */
| |
− | #define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
| |
− | #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
| |
− | #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
| |
− |
| |
− | /*-----------------------------------------------------------------------
| |
− | * Definitions for Serial Presence Detect EEPROM address
| |
− | * (to get SDRAM settings)
| |
− | */
| |
− | #define SPD_EEPROM_ADDRESS 0x50
| |
− |
| |
− |
| |
− |
| |
− |
| |
− | #ifdef CONFIG_DHT_WALNUT
| |
− |
| |
− | #undef CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
| |
− | #define CONFIG_SYS_PROMPT "# " /* Monitor Command Prompt */
| |
− | #unf CONFIG_BOOTDELAY /* autoboot after 5 seconds */
| |
− | #define CONFIG_BOOTDELAY 10 /* autoboot after 5 seconds */
| |
− | #endif
| |
− |
| |
− |
| |
− |
| |
− | /*-----------------------------------------------------------------------
| |
− | * support, specific for dht-walnut
| |
− | */
| |
− | //L5
| |
− | #ifdef CONFIG_DHT_WALNUT
| |
− |
| |
− | //#undef CFG_LOAD_ADDR 0x100000 /* default load address */
| |
− | //#define CFG_LOAD_ADDR 0x200000 /* default load address */
| |
− |
| |
− |
| |
− | /***********************************************************************
| |
− | * External peripheral base address
| |
− | ***********************************************************************/
| |
− | #define CFG_ISA_IO_BASE_ADDRESS 0xE8000000
| |
− |
| |
− | /************************************************************
| |
− | * IDE/ATA stuff
| |
− | ************************************************************/
| |
− | #define CFG_IDE_MAXBUS 1 /* max. 2 IDE busses */
| |
− | #define CONFIG_SYS_IDE_MAXBUS 1 /* max. 2 IDE busses */ // new env
| |
− | #define CFG_IDE_MAXDEVICE (CFG_IDE_MAXBUS*2) /* max. 2 per IDE bus */
| |
− | #define CONFIG_SYS_IDE_MAXDEVICE (CFG_IDE_MAXBUS*2) /* max. 2 per IDE bus */ // new env
| |
− |
| |
− | #define CFG_ATA_BASE_ADDR CFG_ISA_IO_BASE_ADDRESS /* base address */
| |
− | #define CONFIG_SYS_ATA_BASE_ADDR CFG_ISA_IO_BASE_ADDRESS /* base address */ // new env
| |
− |
| |
− |
| |
− | #define CFG_ATA_IDE0_OFFSET 0x01F0 /* ide0 offset */
| |
− | #define CFG_ATA_DATA_OFFSET 0 /* data reg offset */
| |
− | #define CONFIG_SYS_ATA_DATA_OFFSET 0 /* data reg offset */
| |
− |
| |
− | #define CFG_ATA_REG_OFFSET 0 /* reg offset */
| |
− | #define CONFIG_SYS_ATA_REG_OFFSET 0 /* reg offset */ // new env
| |
− |
| |
− | #define CFG_ATA_ALT_OFFSET 0x200 /* alternate register offset */
| |
− | #define CONFIG_SYS_ATA_ALT_OFFSET 0x200 /* alternate register offset */ // new env
| |
− |
| |
− | #undef CONFIG_IDE_8xx_DIRECT /* no pcmcia interface required */
| |
− | #undef CONFIG_IDE_LED /* no led for ide supported */
| |
− | #undef CONFIG_IDE_RESET /* no reset for ide supported */
| |
− |
| |
− | #define CONFIG_LBA48 1
| |
− | #define CONFIG_MAC_PARTITION 1
| |
− | #define CONFIG_DOS_PARTITION 1
| |
− | #define CONFIG_ISO_PARTITION 1
| |
− |
| |
− | #define CONFIG_SUPPORT_VFAT
| |
− |
| |
− |
| |
− | /************************************************************
| |
− | * ATAPI support (experimental)
| |
− | ************************************************************/
| |
− | #define CONFIG_ATAPI /* enable ATAPI Support */
| |
− |
| |
− | /************************************************************
| |
− | * SCSI support (experimental) only SYM53C8xx supported
| |
− | ************************************************************/
| |
− | #define CONFIG_SCSI_SYM53C8XX
| |
− | #define CFG_SCSI_MAX_LUN 8 /* number of supported LUNs */
| |
− | #define CFG_SCSI_MAX_SCSI_ID 7 /* maximum SCSI ID (0..6) */
| |
− | #define CFG_SCSI_MAX_DEVICE CFG_SCSI_MAX_SCSI_ID * CFG_SCSI_MAX_LUN /* maximum Target devices */
| |
− | #define CFG_SCSI_SPIN_UP_TIME 2
| |
− |
| |
− | //L5
| |
− | #endif
| |
− |
| |
− |
| |
− |
| |
− |
| |
− | /*-----------------------------------------------------------------------
| |
− | * Booting and default environment, specific for dht-walnut
| |
− | */
| |
− | //L6
| |
− | #ifdef CONFIG_DHT_WALNUT
| |
− |
| |
− | /*
| |
− | * Booting and default environment
| |
− | */
| |
− | #define CONFIG_PREBOOT "echo;" \
| |
− | "echo \"run script\";" \
| |
− | "echo"
| |
− | #define CONFIG_BOOTCOMMAND "run boot-ramrootfs"
| |
− |
| |
− | /*
| |
− | * Only some boards need to extend the bootargs by some additional
| |
− | * parameters (like Makalu)
| |
− | */
| |
− | #undef CONFIG_ADDMISC
| |
− | #define CONFIG_ADDMISC "addmisc=setenv bootargs ${bootargs}\0"
| |
− |
| |
− | /*
| |
− | * General common environment variables shared on all AMCC eval boards
| |
− | */
| |
− | #undef CONFIG_HOSTNAME
| |
− | #define CONFIG_HOSTNAME "dht-walnut"
| |
− |
| |
− | #undef CONFIG_AMCC_DEF_ENV
| |
− | #define CONFIG_AMCC_DEF_ENV \
| |
− | "addip=setenv bootargs ${bootargs} " \
| |
− | "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
| |
− | ":${hostname}:${netdev}:off panic=1\0" \
| |
− | "addtty=setenv bootargs ${bootargs}" \
| |
− | " console=" xstr(CONFIG_USE_TTY) ",${baudrate}\0" \
| |
− | CONFIG_ADDMISC \
| |
− | "initrd_high=30000000\0" \
| |
− | "kernel_addr_r=400000\0" \
| |
− | "fdt_addr_r=800000\0" \
| |
− | "hostname=" xstr(CONFIG_HOSTNAME) "\0" \
| |
− | "bootfile=" xstr(CONFIG_HOSTNAME) "/uImage\0" \
| |
− | CONFIG_AMCC_DEF_ENV_ROOTPATH
| |
− |
| |
− | /*
| |
− | * Default environment for arch/ppc booting,
| |
− | * for boards that are not ported to arch/powerpc yet
| |
− | */
| |
− | // #undef CONFIG_AMCC_DEF_ENV_PPC
| |
− |
| |
− |
| |
− | /*
| |
− | * Default environment for arch/ppc booting (old version),
| |
− | * for boards that are ported to arch/ppc and arch/powerpc
| |
− | */
| |
− | // #undef CONFIG_AMCC_DEF_ENV_PPC_OLD
| |
− |
| |
− | /*
| |
− | * Default environment for arch/ppc booting (old version),
| |
− | * for boards that are ported to arch/ppc and arch/powerpc
| |
− | */
| |
− | // #undef CONFIG_AMCC_DEF_ENV_PPC_OLD
| |
− |
| |
− | #define CONFIG_AMCC_DEF_ENV_NOR_UPD \
| |
− | "load=tftp 200000 " xstr(CONFIG_HOSTNAME) "/u-boot.bin\0" \
| |
− | "update=protect off " xstr(CONFIG_SYS_MONITOR_BASE) " FFFFFFFF;" \
| |
− | "era " xstr(CONFIG_SYS_MONITOR_BASE) " FFFFFFFF;" \
| |
− | "cp.b ${fileaddr} " xstr(CONFIG_SYS_MONITOR_BASE) " ${filesize};" \
| |
− | "setenv filesize;saveenv\0" \
| |
− | "upd=run load update\0" \
| |
− |
| |
− | #define CONFIG_AMCC_DEF_ENV_NAND_UPD \
| |
− | "nload=tftp 200000 " xstr(CONFIG_HOSTNAME) "/u-boot-nand.bin\0" \
| |
− | "nupdate=nand erase 0 100000;nand write 200000 0 100000;" \
| |
− | "setenv filesize;saveenv\0" \
| |
− | "nupd=run nload nupdate\0"
| |
− | // L6
| |
− | #endif
| |
− |
| |
− |
| |
− |
| |
− |
| |
− | #endif /* __CONFIG_H */
| |
− | </pre>
| |
− |
| |
− |
| |
− | == no working ide, dht-walnut, ramrootfs (ide is ok for linux) ==
| |
− |
| |
− | <pre>
| |
− | U-Boot 2009.06-00298-g3672cd5-dirty (Jul 13 2009 - 19:05:51)
| |
− |
| |
− | CPU: AMCC PowerPC 405GP Rev. E at 266.640 MHz (PLB=66, OPB=33, EBC=33 MHz)
| |
− | Internal PCI arbiter enabled, PCI async ext clock used
| |
− | 16 kB I-Cache 8 kB D-Cache
| |
− | Board: DHT Walnut - IBM PPC405GP Board
| |
− | I2C: ready
| |
− | DRAM: 32 MB
| |
− | FLASH: 512 kB
| |
− | PCI: Bus Dev VenId DevId Class Int
| |
− | 00 04 105a 0d30 0101 1d
| |
− | Net: ppc_4xx_eth0
| |
− | IDE: Bus 0: ............................................................** Timeout **
| |
− |
| |
− | Type run flash_nfs to mount root filesystem over NFS
| |
− |
| |
− | Hit any key to stop autoboot: 5..0
| |
− |
| |
− | => tftpboot 800000 gentoo-walnut-ramrootfs.img
| |
− | Using ppc_4xx_eth0 device
| |
− | TFTP from server 192.168.1.14; our IP address is 192.168.1.2
| |
− | Filename 'gentoo-walnut-ramrootfs.img'.
| |
− | Load address: 0x800000
| |
− | Loading: #################################################################
| |
− | #################################################################
| |
− | #################################################################
| |
− | #################################################################
| |
− | #########################
| |
− | done
| |
− | Bytes transferred = 4183409 (3fd571 hex)
| |
− | => bootm
| |
− | ## Booting kernel from Legacy Image at 00800000 ...
| |
− | Image Name: "ramrootfs"
| |
− | Created: 2009-07-10 9:25:46 UTC
| |
− | Image Type: PowerPC Linux Kernel Image (gzip compressed)
| |
− | Data Size: 4183345 Bytes = 4 MB
| |
− | Load Address: 00000000
| |
− | Entry Point: 00000000
| |
− | Verifying Checksum ... OK
| |
− | Uncompressing Kernel Image ... OK
| |
− | Linux version 2.6.15.4-sliding-snow-leopard-dht-walnut-ppc405 (root@minerva) (gcc version 4.1.2) #52 Fri Jul 10 11:25:34 CEST 2009
| |
− | IBM Walnut port (C) 2000-2002 MontaVista Software, Inc. (source@mvista.com)
| |
− | Built 1 zonelists
| |
− | Kernel command line: console=ttyS0,9600 rdinit=/sbin/init init=/bin/bash
| |
− | PID hash table entries: 256 (order: 8, 4096 bytes)
| |
− | Warning: real time clock seems stuck!
| |
− | Console: colour dummy device 80x25
| |
− | Dentry cache hash table entries: 8192 (order: 3, 32768 bytes)
| |
− | Inode-cache hash table entries: 4096 (order: 2, 16384 bytes)
| |
− | Memory: 26880k available (1932k kernel code, 604k data, 2992k init, 0k highmem)
| |
− | Mount-cache hash table entries: 512
| |
− | NET: Registered protocol family 16
| |
− | PCI: Probing PCI hardware
| |
− | PCI: Cannot allocate resource region 5 of device 0000:00:04.0
| |
− | fuse init (API version 7.3)
| |
− | Initializing Cryptographic API
| |
− | io scheduler noop registered
| |
− | io scheduler anticipatory registered
| |
− | io scheduler deadline registered
| |
− | io scheduler cfq registered
| |
− | Generic RTC Driver v1.07
| |
− | Serial: 8250/16550 driver $Revision: 1.90 $ 4 ports, IRQ sharing disabled
| |
− | serial8250: ttyS0 at MMIO 0x0 (irq = 0) is a 16550A
| |
− | serial8250: ttyS1 at MMIO 0x0 (irq = 1) is a 16550A
| |
− | loop: loaded (max 8 devices)
| |
− | PPC 4xx OCP EMAC driver, version 3.54
| |
− | mal0: initialized, 1 TX channels, 1 RX channels
| |
− | eth0: emac0, MAC de:ad:be:ef:de:ad
| |
− | eth0: found Generic MII PHY (0x09)
| |
− | tun: Universal TUN/TAP device driver, 1.6
| |
− | tun: (C) 1999-2004 Max Krasnyansky <maxk@qualcomm.com>
| |
− | Uniform Multi-Platform E-IDE driver Revision: 7.00alpha2
| |
− | ide: Assuming 33MHz system bus speed for PIO modes; override with idebus=xx
| |
− | PDC20265: IDE controller at PCI slot 0000:00:04.0
| |
− | PCI: Enabling device 0000:00:04.0 (0004 -> 0007)
| |
− | PDC20265: chipset revision 2
| |
− | PDC20265: not 100% native mode: will probe irqs later
| |
− | PDC20265: (U)DMA Burst Bit DISABLED Primary PCI Mode Secondary PCI Mode.
| |
− | ide0: BM-DMA at 0x6800-0x6807, BIOS settings: hda:pio, hdb:pio
| |
− | ide1: BM-DMA at 0x6808-0x680f, BIOS settings: hdc:pio, hdd:DMA
| |
− | hdb: LEXAR ATA_FLASH, CFA DISK drive
| |
− | hdb: set_drive_speed_status: status=0x51 { DriveReady SeekComplete Error }
| |
− | hdb: set_drive_speed_status: error=0x04 { DriveStatusError }
| |
− | ide0 at 0x1f0-0x1f7,0x3f6 on irq 31
| |
− | hdb: max request size: 128KiB
| |
− | hdb: 15744 sectors (8 MB) w/1KiB Cache, CHS=246/2/32
| |
− | hdb: cache flushes not supported
| |
− | hdb: [mac] hdb1 hdb2 hdb3
| |
− | I2O subsystem v1.288
| |
− | i2o: max drivers = 8
| |
− | I2O ProcFS OSM v1.145
| |
− | NET: Registered protocol family 2
| |
− | IP route cache hash table entries: 512 (order: -1, 2048 bytes)
| |
− | TCP established hash table entries: 2048 (order: 1, 8192 bytes)
| |
− | TCP bind hash table entries: 2048 (order: 1, 8192 bytes)
| |
− | TCP: Hash tables configured (established 2048 bind 2048)
| |
− | TCP reno registered
| |
− | TCP bic registered
| |
− | NET: Registered protocol family 1
| |
− | NET: Registered protocol family 17
| |
− | 802.1Q VLAN Support v1.8 Ben Greear <greearb@candelatech.com>
| |
− | All bugs added by David S. Miller <davem@redhat.com>
| |
− | Freeing unused kernel memory: 2992k init
| |
− | [*] mount
| |
− | [*] ttykeymaps
| |
− | /dev/tty0 /dev/tty1 /dev/tty2 /dev/tty3 /dev/tty4 /dev/tty5 /dev/tty6 /dev/tty7
| |
− | /dev/ttyS0
| |
− | [*] clock
| |
− | [*] hostname
| |
− | [*] networking
| |
− | eth0: link is up, 100 FDX
| |
− | [*] telnetd
| |
− |
| |
− | e a r l y r a m r o o t f s
| |
− | Y O U H A V E T H E P O W E R U S E C A R E F U L L Y
| |
− | i n s e r t c o i n s p l e a s e
| |
− |
| |
− |
| |
− | ,,,,
| |
− | $$$$$$
| |
− | $$$$$$$$$ D H T - W A L N U T 4 0 5 G P
| |
− | $$$$$$$$$$$ ,,
| |
− | $$$$$$$$$$$$ $$$$$,
| |
− | `$$$$$$$$$$$ $$$$$$$$
| |
− | `$$$$$$$$$Z$ $$$ $$$ $$$$$$$$`
| |
− | `$ZzZ$$$Z$$$ $$$$$$$ $$$$$$$ $$$$$$$$`
| |
− | `$$$ZZZ$$$$$ $$$$$$$$$ $$$$$$$$$ $$$$$$$$`
| |
− | `$$$$$$$$$$ $$ZZ$$$$$ $$ZZZ$$$$ $$$$$$$$
| |
− | u$$$$$$u `$$$$$$$$$$ $$$ZZZ$$ $$$$$ZZ$$ $$$$$$$`
| |
− | $$$$$$$$$$Z$ `$ZZ$$$ZZZ $$$$$$$$ $$$$$$$$$ $$$$$$
| |
− | $$$$$$$$$$$Z$$$$ $$$$zzz$$$ $$$$$$$$ $$$$$$$$$ $$$$$$`
| |
− | $$$$$$$$$$Z$$$$$$$$$$$$$$$$$ $$ZZ$$$$ $ZZZ$$$$$ $$$$$`
| |
− | `$$$$$$$Z$$$$$$$$$$$$$$$$$ $$$$$ZZ$ $ $$$$$$$ $$$$$`
| |
− | `$Z$$$$$$$$$$$$$$$$$$ $SB$$$ $$ $$$$$$ $$$$`
| |
− | `$$$$$$$$$$$$$$$$$$$,````,$$$$, ````,$$$$`
| |
− | `$$$$$$$$$$$$$$$$$$$$$$ $$$$$$$$$$$$$$$`
| |
− | `$$$$$$$$$$$$$$$$$$$$$ $$$$$$$$$$$$$`
| |
− | `$$$$$$$$$$$$$$$$$$$ $$$$$$$$$$$$`
| |
− | `$$$$$$$$$$$$$$$$ $$$$$$$$$$`
| |
− | `$$$$$$$$$$$$$$$$ $$$$$$$`
| |
− | $$$$$$$$$$$$$$$$$$$$$$
| |
− |
| |
− | P o w e r P C m a c h i n e
| |
− |
| |
− | genuine interest in the u' n i x platform
| |
− | genuine appreciation of solid engineering
| |
− |
| |
− | earlyrootfs login: root
| |
− | Password:
| |
− | M e s s a g e O f T h e D a y
| |
− | i n s e r t c o i n s p l e a s e
| |
− | uc-earlyrootfs ~ #
| |
− | </pre>
| |
− |
| |
− | == old firmware (uboot 1.1.4) works with ide but it fails at tftpboot ramrootfs ==
| |
− |
| |
− | <pre>
| |
− | U-Boot 1.1.4 (Jul 16 2009 - 12:11:07)
| |
− |
| |
− | CPU: AMCC PowerPC 405GP Rev. E at 266.640 MHz (PLB=66, OPB=33, EBC=33 MHz)
| |
− | Internal PCI arbiter enabled, PCI async ext clock used
| |
− | 16 kB I-Cache 8 kB D-Cache
| |
− | Board: DHT Walnut
| |
− | I2C: ready
| |
− | DRAM: 32 MB
| |
− | FLASH: 512 kB
| |
− | PCI: Bus Dev VenId DevId Class Int
| |
− | 00 04 105a 0d30 0101 1d
| |
− | In: serial
| |
− | Out: serial
| |
− | Err: serial
| |
− | Net: ppc_4xx_eth0
| |
− | IDE: Bus 0: OK
| |
− | Device 0: not available
| |
− | Device 1: Model: LEXAR ATA_FLASH Firm: V3.04. Ser#:
| |
− | Type: Removable Hard Disk
| |
− | Capacity: 7.6 MB = 0.0 GB (15744 x 512)
| |
− | BEDBUG:ready
| |
− |
| |
− | Type "run flash_nfs" to mount root filesystem over NFS
| |
− |
| |
− | Hit any key to stop autoboot: 0
| |
− | ENET Speed is 100 Mbps - FULL duplex connection
| |
− | Using ppc_4xx_eth0 device
| |
− | TFTP from server 192.168.1.14; our IP address is 192.168.1.2
| |
− | Filename 'gentoo-walnut-ramrootfs.img'.
| |
− | Load address: 0x800000
| |
− | Loading: #################################################################
| |
− | #################################################################
| |
− | #################################################################
| |
− | #################################################################
| |
− | #################################################################
| |
− | #################################################################
| |
− | #################################################################
| |
− | #################################################################
| |
− | #################################################################
| |
− | #################################################################
| |
− | #################################################################
| |
− | #################################################################
| |
− | ######################################
| |
− | done
| |
− | Bytes transferred = 4183409 (3fd571 hex)
| |
− | ## Booting image at 00800000 ...
| |
− | Image Name: "ramrootfs"
| |
− | Created: 2009-07-10 9:25:46 UTC
| |
− | Image Type: PowerPC Linux Kernel Image (gzip compressed)
| |
− | Data Size: 4183345 Bytes = 4 MB
| |
− | Load Address: 00000000
| |
− | Entry Point: 00000000
| |
− | Verifying Checksum ... OK
| |
− | Uncompressing Kernel Image ... OK
| |
− | Linux version 2.6.15.4-sliding-snow-leopard-dht-walnut-ppc405 (root@minerva) (gcc version 4.1.2) #52 Fri Jul 10 11:25:34 CEST 2009
| |
− | IBM Walnut port (C) 2000-2002 MontaVista Software, Inc. (source@mvista.com)
| |
− | Built 1 zonelists
| |
− | Kernel command line: console=ttyS0,9600 rdinit=/sbin/init init=/bin/bash
| |
− | PID hash table entries: 256 (order: 8, 4096 bytes)
| |
− | Warning: real time clock seems stuck!
| |
− | Console: colour dummy device 80x25
| |
− | Dentry cache hash table entries: 8192 (order: 3, 32768 bytes)
| |
− | Inode-cache hash table entries: 4096 (order: 2, 16384 bytes)
| |
− | Memory: 26880k available (1932k kernel code, 604k data, 2992k init, 0k highmem)
| |
− | Mount-cache hash table entries: 512
| |
− | Kernel panic - not syncing: invalid compressed format (err=1)
| |
− | <0>Rebooting in 180 seconds..þð
| |
− |
| |
− | </pre>
| |