Flameman/dht-walnut/proof
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Contents |
new-firmware
uboot-2009
no working ide, dht-walnut
U-Boot 2009.06-00298-g3672cd5-dirty (Jul 13 2009 - 19:05:51)
CPU: AMCC PowerPC 405GP Rev. E at 266.640 MHz (PLB=66, OPB=33, EBC=33 MHz)
Internal PCI arbiter enabled, PCI async ext clock used
16 kB I-Cache 8 kB D-Cache
Board: DHT Walnut - IBM PPC405GP Board
I2C: ready
DRAM: 32 MB
FLASH: 512 kB
PCI: Bus Dev VenId DevId Class Int
00 04 105a 0d30 0101 1d
Net: ppc_4xx_eth0
IDE: Bus 0: ............................................................** Timeout **
=> help ide
ide - IDE sub-system
Usage:
ide reset - reset IDE controller
ide info - show available IDE devices
ide device [dev] - show or set current device
ide part [dev] - print partition table of one or all IDE devices
ide read addr blk# cnt
ide write addr blk# cnt - read/write `cnt' blocks starting at block `blk#'
to/from memory address `addr'
=> ide info
IDE device 0: device type unknown
IDE device 1: device type unknown
=> pci
Scanning PCI devices on bus 0
BusDevFun VendorId DeviceId Device Class Sub-Class
_____________________________________________________________
00.00.00 0x1014 0x0156 Bridge device 0x00
00.04.00 0x105a 0x0d30 Mass storage controller 0x01
=> help pci
pci - list and access PCI Configuration Space
Usage:
pci [bus] [long]
- short or long list of PCI devices on bus 'bus'
pci header b.d.f
- show header of PCI device 'bus.device.function'
pci display[.b, .w, .l] b.d.f [address] [# of objects]
- display PCI configuration space (CFG)
pci next[.b, .w, .l] b.d.f address
- modify, read and keep CFG address
pci modify[.b, .w, .l] b.d.f address
- modify, auto increment CFG address
pci write[.b, .w, .l] b.d.f address value
- write to CFG address
=> pci header 00.04.00
vendor ID = 0x105a
device ID = 0x0d30
command register = 0x0004
status register = 0x0210
revision ID = 0x02
class code = 0x01 (Mass storage controller)
sub class code = 0x01
programming interface = 0x8a
cache line = 0x00
latency time = 0x40
header type = 0x00
BIST = 0x00
base address 0 = 0x00000000
base address 1 = 0x00000000
base address 2 = 0x00000000
base address 3 = 0x00000000
base address 4 = 0x00006801
base address 5 = 0x00000000
cardBus CIS pointer = 0x00000000
sub system vendor ID = 0x105a
sub system ID = 0x4d33
expansion ROM base address = 0x000dc000
interrupt line = 0x1d
interrupt pin = 0x01
min Grant = 0x00
max Latency = 0x00
=> pci display 00.04.00
00000000: 0d30105a 02100004 01018a02 00004000
00000010: 00000000 00000000 00000000 00000000
00000020: 00006801 00000000 00000000 4d33105a
00000030: 000dc000 00000058 00000000 0000011d
=> pci lo� �ong
Scanning PCI devices on bus 0
Found PCI device 00.00.00:
vendor ID = 0x1014
device ID = 0x0156
command register = 0x0006
status register = 0x2210
revision ID = 0x01
class code = 0x06 (Bridge device)
sub class code = 0x00
programming interface = 0x00
cache line = 0x00
latency time = 0x07
header type = 0x00
BIST = 0x00
base address 0 = 0x00000000
base address 1 = 0x00000008
base address 2 = 0x00000000
base address 3 = 0x00000000
base address 4 = 0x00000000
base address 5 = 0x00000000
cardBus CIS pointer = 0x00000000
sub system vendor ID = 0x10e8
sub system ID = 0xcafe
expansion ROM base address = 0x00000000
interrupt line = 0x00
interrupt pin = 0x01
min Grant = 0x00
max Latency = 0x00
Found PCI device 00.04.00:
vendor ID = 0x105a
device ID = 0x0d30
command register = 0x0004
status register = 0x0210
revision ID = 0x02
class code = 0x01 (Mass storage controller)
sub class code = 0x01
programming interface = 0x8a
cache line = 0x00
latency time = 0x40
header type = 0x00
BIST = 0x00
base address 0 = 0x00000000
base address 1 = 0x00000000
base address 2 = 0x00000000
base address 3 = 0x00000000
base address 4 = 0x00006801
base address 5 = 0x00000000
cardBus CIS pointer = 0x00000000
sub system vendor ID = 0x105a
sub system ID = 0x4d33
expansion ROM base address = 0x000dc000
interrupt line = 0x1d
interrupt pin = 0x01
min Grant = 0x00
max Latency = 0x00
=> ide
ide - IDE sub-system
Usage:
ide reset - reset IDE controller
ide info - show available IDE devices
ide device [dev] - show or set current device
ide part [dev] - print partition table of one or all IDE devices
ide read addr blk# cnt
ide write addr blk# cnt - read/write `cnt' blocks starting at block `blk#'
to/from memory address `addr'
=> ide reset
Reset IDE: Bus 0: ............................................................** Timeout **
working ide, dht-walnut
U-Boot 1.2.0-g7882751c-dirty (Apr 14 2007 - 16:44:37)
CPU: AMCC PowerPC 405GP Rev. E at 266.640 MHz (PLB=66, OPB=33, EBC=33 MHz)
Internal PCI arbiter enabled, PCI async ext clock used
16 kB I-Cache 8 kB D-Cache
Board: Walnut - AMCC PPC405GP Evaluation Board
I2C: ready
DRAM: 32 MB
FLASH: 512 kB
PCI: Bus Dev VenId DevId Class Int
00 04 105a 0d30 0101 1d
In: serial
Out: serial
Err: serial
Net: ppc_4xx_eth0
IDE: Bus 0: OK
Device 0: not available
Device 1: not available
"ide.part.1th stores kernel rawimage"
Hit any key to stop autoboot: 5..0
=> pci
Scanning PCI devices on bus 0
BusDevFun VendorId DeviceId Device Class Sub-Class
_____________________________________________________________
00.00.00 0x1014 0x0156 Bridge device 0x00
00.04.00 0x105a 0x0d30 Mass storage controller 0x01
=> help pci
pci [bus] [long]
- short or long list of PCI devices on bus 'bus'
pci header b.d.f
- show header of PCI device 'bus.device.function'
pci display[.b, .w, .l] b.d.f [address] [# of objects]
- display PCI configuration space (CFG)
pci next[.b, .w, .l] b.d.f address
- modify, read and keep CFG address
pci modify[.b, .w, .l] b.d.f address
- modify, auto increment CFG address
pci write[.b, .w, .l] b.d.f address value
- write to CFG address
=> pci long
Scanning PCI devices on bus 0
Found PCI device 00.00.00:
vendor ID = 0x1014
device ID = 0x0156
command register = 0x0006
status register = 0x2210
revision ID = 0x01
class code = 0x06 (Bridge device)
sub class code = 0x00
programming interface = 0x00
cache line = 0x00
latency time = 0x07
header type = 0x00
BIST = 0x00
base address 0 = 0x00000000
base address 1 = 0x00000008
base address 2 = 0x00000000
base address 3 = 0x00000000
base address 4 = 0x00000000
base address 5 = 0x00000000
cardBus CIS pointer = 0x00000000
sub system vendor ID = 0x10e8
sub system ID = 0xcafe
expansion ROM base address = 0x00000000
interrupt line = 0x00
interrupt pin = 0x01
min Grant = 0x00
max Latency = 0x00
Found PCI device 00.04.00:
vendor ID = 0x105a
device ID = 0x0d30
command register = 0x0007
status register = 0x0210
revision ID = 0x02
class code = 0x01 (Mass storage controller)
sub class code = 0x01
programming interface = 0x8a
cache line = 0x00
latency time = 0x80
header type = 0x00
BIST = 0x00
base address 0 = 0x00000000
base address 1 = 0x00000000
base address 2 = 0x00000000
base address 3 = 0x00000000
base address 4 = 0x00800001
base address 5 = 0x80000000
cardBus CIS pointer = 0x00000000
sub system vendor ID = 0x105a
sub system ID = 0x4d33
expansion ROM base address = 0x000dc000
interrupt line = 0x1d
interrupt pin = 0x01
min Grant = 0x00
max Latency = 0x00
=> pci header 00.04.00
vendor ID = 0x105a
device ID = 0x0d30
command register = 0x0007
status register = 0x0210
revision ID = 0x02
class code = 0x01 (Mass storage controller)
sub class code = 0x01
programming interface = 0x8a
cache line = 0x00
latency time = 0x80
header type = 0x00
BIST = 0x00
base address 0 = 0x00000000
base address 1 = 0x00000000
base address 2 = 0x00000000
base address 3 = 0x00000000
base address 4 = 0x00800001
base address 5 = 0x80000000
cardBus CIS pointer = 0x00000000
sub system vendor ID = 0x105a
sub system ID = 0x4d33
expansion ROM base address = 0x000dc000
interrupt line = 0x1d
interrupt pin = 0x01
min Grant = 0x00
max Latency = 0x00
=> pci display 00.04.00
00000000: 0d30105a 02100007 01018a02 00008000
00000010: 00000000 00000000 00000000 00000000
00000020: 00800001 80000000 00000000 4d33105a
00000030: 000dc000 00000058 00000000 0000011d
=>
00000000: 0d30105a 02100007 01018a02 00008000
00000010: 00000000 00000000 00000000 00000000
00000020: 00800001 80000000 00000000 4d33105a
00000030: 000dc000 00000058 00000000 0000011d
=>
00000000: 0d30105a 02100007 01018a02 00008000
00000010: 00000000 00000000 00000000 00000000
00000020: 00800001 80000000 00000000 4d33105a
00000030: 000dc000 00000058 00000000 0000011d
no working ide, dht-walnut, ramrootfs (ide is ok for linux)
U-Boot 2009.06-00298-g3672cd5-dirty (Jul 13 2009 - 19:05:51)
CPU: AMCC PowerPC 405GP Rev. E at 266.640 MHz (PLB=66, OPB=33, EBC=33 MHz)
Internal PCI arbiter enabled, PCI async ext clock used
16 kB I-Cache 8 kB D-Cache
Board: DHT Walnut - IBM PPC405GP Board
I2C: ready
DRAM: 32 MB
FLASH: 512 kB
PCI: Bus Dev VenId DevId Class Int
00 04 105a 0d30 0101 1d
Net: ppc_4xx_eth0
IDE: Bus 0: ............................................................** Timeout **
Type run flash_nfs to mount root filesystem over NFS
Hit any key to stop autoboot: 5..0
=> tftpboot 800000 gentoo-walnut-ramrootfs.img
Using ppc_4xx_eth0 device
TFTP from server 192.168.1.14; our IP address is 192.168.1.2
Filename 'gentoo-walnut-ramrootfs.img'.
Load address: 0x800000
Loading: #################################################################
#################################################################
#################################################################
#################################################################
#########################
done
Bytes transferred = 4183409 (3fd571 hex)
=> bootm
## Booting kernel from Legacy Image at 00800000 ...
Image Name: "ramrootfs"
Created: 2009-07-10 9:25:46 UTC
Image Type: PowerPC Linux Kernel Image (gzip compressed)
Data Size: 4183345 Bytes = 4 MB
Load Address: 00000000
Entry Point: 00000000
Verifying Checksum ... OK
Uncompressing Kernel Image ... OK
Linux version 2.6.15.4-sliding-snow-leopard-dht-walnut-ppc405 (root@minerva) (gcc version 4.1.2) #52 Fri Jul 10 11:25:34 CEST 2009
IBM Walnut port (C) 2000-2002 MontaVista Software, Inc. (source@mvista.com)
Built 1 zonelists
Kernel command line: console=ttyS0,9600 rdinit=/sbin/init init=/bin/bash
PID hash table entries: 256 (order: 8, 4096 bytes)
Warning: real time clock seems stuck!
Console: colour dummy device 80x25
Dentry cache hash table entries: 8192 (order: 3, 32768 bytes)
Inode-cache hash table entries: 4096 (order: 2, 16384 bytes)
Memory: 26880k available (1932k kernel code, 604k data, 2992k init, 0k highmem)
Mount-cache hash table entries: 512
NET: Registered protocol family 16
PCI: Probing PCI hardware
PCI: Cannot allocate resource region 5 of device 0000:00:04.0
fuse init (API version 7.3)
Initializing Cryptographic API
io scheduler noop registered
io scheduler anticipatory registered
io scheduler deadline registered
io scheduler cfq registered
Generic RTC Driver v1.07
Serial: 8250/16550 driver $Revision: 1.90 $ 4 ports, IRQ sharing disabled
serial8250: ttyS0 at MMIO 0x0 (irq = 0) is a 16550A
serial8250: ttyS1 at MMIO 0x0 (irq = 1) is a 16550A
loop: loaded (max 8 devices)
PPC 4xx OCP EMAC driver, version 3.54
mal0: initialized, 1 TX channels, 1 RX channels
eth0: emac0, MAC de:ad:be:ef:de:ad
eth0: found Generic MII PHY (0x09)
tun: Universal TUN/TAP device driver, 1.6
tun: (C) 1999-2004 Max Krasnyansky <maxk@qualcomm.com>
Uniform Multi-Platform E-IDE driver Revision: 7.00alpha2
ide: Assuming 33MHz system bus speed for PIO modes; override with idebus=xx
PDC20265: IDE controller at PCI slot 0000:00:04.0
PCI: Enabling device 0000:00:04.0 (0004 -> 0007)
PDC20265: chipset revision 2
PDC20265: not 100% native mode: will probe irqs later
PDC20265: (U)DMA Burst Bit DISABLED Primary PCI Mode Secondary PCI Mode.
ide0: BM-DMA at 0x6800-0x6807, BIOS settings: hda:pio, hdb:pio
ide1: BM-DMA at 0x6808-0x680f, BIOS settings: hdc:pio, hdd:DMA
hdb: LEXAR ATA_FLASH, CFA DISK drive
hdb: set_drive_speed_status: status=0x51 { DriveReady SeekComplete Error }
hdb: set_drive_speed_status: error=0x04 { DriveStatusError }
ide0 at 0x1f0-0x1f7,0x3f6 on irq 31
hdb: max request size: 128KiB
hdb: 15744 sectors (8 MB) w/1KiB Cache, CHS=246/2/32
hdb: cache flushes not supported
hdb: [mac] hdb1 hdb2 hdb3
I2O subsystem v1.288
i2o: max drivers = 8
I2O ProcFS OSM v1.145
NET: Registered protocol family 2
IP route cache hash table entries: 512 (order: -1, 2048 bytes)
TCP established hash table entries: 2048 (order: 1, 8192 bytes)
TCP bind hash table entries: 2048 (order: 1, 8192 bytes)
TCP: Hash tables configured (established 2048 bind 2048)
TCP reno registered
TCP bic registered
NET: Registered protocol family 1
NET: Registered protocol family 17
802.1Q VLAN Support v1.8 Ben Greear <greearb@candelatech.com>
All bugs added by David S. Miller <davem@redhat.com>
Freeing unused kernel memory: 2992k init
[*] mount
[*] ttykeymaps
/dev/tty0 /dev/tty1 /dev/tty2 /dev/tty3 /dev/tty4 /dev/tty5 /dev/tty6 /dev/tty7
/dev/ttyS0
[*] clock
[*] hostname
[*] networking
eth0: link is up, 100 FDX
[*] telnetd
e a r l y r a m r o o t f s
Y O U H A V E T H E P O W E R U S E C A R E F U L L Y
i n s e r t c o i n s p l e a s e
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P o w e r P C m a c h i n e
genuine interest in the u' n i x platform
genuine appreciation of solid engineering
earlyrootfs login: root
Password:
M e s s a g e O f T h e D a y
i n s e r t c o i n s p l e a s e
uc-earlyrootfs ~ #
