Freescale MPC5200 - Revision history

Jwdietrich: PowerPC link

2013-01-09T20:04:51Z

PowerPC link

Cschalle: Add category

2011-10-27T20:44:50Z

Add category

Tim Bird: add page (moved content from Processors page)

2009-12-04T19:28:49Z

add page (moved content from Processors page)

New page

Here is some information about the Freescale MPC5200 (PPC-based SOC)

(This looks like it was ripped directly from a marketing brochure, but oh, well.)

== Description ==
For Linux embedded applications requiring Floating Point in a SOC the MPC5200 is hard to beat.

Freescale's highly integrated, cost-effective [http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=MPC5200&fpsp=1&tab=Documentation_Tab MPC5200] is well suited for networking, media, industrial control, and automotive applications. It delivers 760 MIPS with a Floating Point Unit (FPU), hardware Memory Management Unit (MMU) for fast task switching, is packed with I/O, and operates at only one watt. The MPC5200 serves the processing-intensive network media gateway, network access storage, set-top box, audio jukebox automotive, Internet access, industrial automation, image detection/analysis, and electronic/medical instrumentation markets. With its successful foundation in the automotive/telematics market via the mobileGT™ alliance and platforms, all markets can now enjoy extended temperature, automotive qualification, and life cycles typically demanded in that industry. A solid choice of Real Time Operating Systems (RTOS) and development boards with Board Support Packages (BSPs) provides users with a complete and flexible set of solutions.

== Product Highlights ==

The MPC5200 is based on a 400 MHz MPC603e PowerPC core with an integrated double precision Floating Point Unit (FPU) that is qualified at -40oC to +85oC. It incorporates a hardware-based memory management unit (MMU) for advanced memory protection schemes, fast task switching and broad RTOS support. The MPC5200 was designed for fast data throughput and processing. The integrated BestComm DMA controller offloads the main MPC603e core from I/O intensive data transfers. An integrated Double Data Rate (DDR) memory controller accelerates data access with an effective memory bus speed of 266 MHz. A high-speed PCI interface backed by the BestComm DMA controller and DDR memory support enables high-speed data transfers in and out of the MPC5200.

* MPC603e series PowerPC™ processor core
* 0-400 MHz operation at -40oC to +85oC temperature range
* Double Precision Floating Point Unit (FPU)
* Instruction and Data Memory Management Unit (MMU)
* 16K Instruction and 16K Data Caches
* BestComm Intelligent DMA I/O Controller
* SDR and 133 MHz Double Data Rate (DDR) memory interface (266 MHz effective)
* Local Plus interface for flash memory, etc.
* 10/100 Ethernet MAC
* Peripheral Control Interface (PCI) Version 2.2
* ATA/IDE Interface
* USB 1.1 Host (two each. USB 2.0 compatible)
* Programmable Serial Controllers (six)
* Serial Peripheral Interface (SPI)
* I2C (two)
* I2S (up to three)
* CAN 2.0 A/B (two)
* J1850 BDLC-D
* GPIO (up to 56)
* 8 Timers
* 1.5V core, 3.3V external (and 2.5V for DDR memory)
* 272 Pin Plastic Pin Ball Grid Array (PBGA) Package
* AEC-Q100, QS9000/TS-16949 automotive grade available
* Lead (Pb) and lead-free packages

← Older revision		Revision as of 20:44, 27 October 2011
Line 36:		Line 36:
	* AEC-Q100, QS9000/TS-16949 automotive grade available		* AEC-Q100, QS9000/TS-16949 automotive grade available
	* Lead (Pb) and lead-free packages		* Lead (Pb) and lead-free packages
		+
		+	[[Category:PowerPC processors\| ]]

@@ Line 1: / Line 1: @@
-Here is some information about the Freescale MPC5200 (PPC-based SOC)
+Here is some information about the Freescale MPC5200 ([[PPC]]-based SOC)
 (This looks like it was ripped directly from a marketing brochure, but oh, well.)
@@ Line 10: / Line 10: @@
 == Product Highlights ==
-The MPC5200 is based on a 400 MHz MPC603e PowerPC core with an integrated double precision Floating Point Unit (FPU) that is qualified at -40oC to +85oC. It incorporates a hardware-based memory management unit (MMU) for advanced memory protection schemes, fast task switching and broad RTOS support. The MPC5200 was designed for fast data throughput and processing. The integrated BestComm DMA controller offloads the main MPC603e core from I/O intensive data transfers. An integrated Double Data Rate (DDR) memory controller accelerates data access with an effective memory bus speed of 266 MHz. A high-speed PCI interface backed by the BestComm DMA controller and DDR memory support enables high-speed data transfers in and out of the MPC5200.
+The MPC5200 is based on a 400 MHz MPC603e [[PowerPC]] core with an integrated double precision Floating Point Unit (FPU) that is qualified at -40oC to +85oC. It incorporates a hardware-based memory management unit (MMU) for advanced memory protection schemes, fast task switching and broad RTOS support. The MPC5200 was designed for fast data throughput and processing. The integrated BestComm DMA controller offloads the main MPC603e core from I/O intensive data transfers. An integrated Double Data Rate (DDR) memory controller accelerates data access with an effective memory bus speed of 266 MHz. A high-speed PCI interface backed by the BestComm DMA controller and DDR memory support enables high-speed data transfers in and out of the MPC5200.
      * MPC603e series PowerPC™ processor core