Difference between revisions of "LF-1000"
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[[File:lf-1000.jpg|right]] | [[File:lf-1000.jpg|right]] | ||
== Summary == | == Summary == | ||
| − | + | OEM branded version of the MagicEyes [[Pollux]] VF3520F [[media:pollux-datasheet.pdf|Datasheet]] | |
| − | + | ||
<br> | <br> | ||
== Features == | == Features == | ||
=== Core === | === Core === | ||
| − | |||
| − | |||
| − | |||
| − | + | ARM926EJ-S- 393MHz | |
| − | + | *16KByte I-Cache | |
| − | * | + | *16KByte D-Cache |
| − | * | + | |
| − | |||
| − | + | 90 nm Process | |
| + | 288pin FBGA | ||
| + | 15mm x 15mm | ||
| + | 0.65mm pitch | ||
| + | |||
| + | |||
| + | High performance 32bit CPU Core | ||
| + | |||
| + | Jazelle Java Hardware Accelerator | ||
=== Memory === | === Memory === | ||
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
| − | *8 Channel DMA | + | DDR SDRAM Controller |
| + | *133MHz DDR SDRAM memory x 16bit | ||
| + | *Single DDR memory bank | ||
| + | *Up to 128MB | ||
| + | *Peak Memory Bandwidth : 533MByte/sec | ||
| + | |||
| + | 8 Channel DMA | ||
=== Storage === | === Storage === | ||
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
| − | + | Static Bus controller | |
| − | + | 16 bit data bus | |
| − | + | 8 bit NAND flash and 8/16 bit SRAM Support | |
| − | + | SLC/ MLC NAND Support | |
| − | + | Boot form NAND flash NOR flash | |
| − | + | IDE interface with PIO mode | |
| − | + | ||
| + | ==== SD/ MMC interface ==== | ||
| + | Two Channels of SD/MMC | ||
| + | SD mem Version 2.00 | ||
| + | SDIO version 1.10 | ||
| + | MMC version 4.2 | ||
| + | clock speed up to 52MHz | ||
| + | PIO and DMA mode data transfer | ||
===3D Graphic Accelerator === | ===3D Graphic Accelerator === | ||
| + | 3D Performance : 133M Texel/sec, 1.33M Polygon/sec | ||
| + | OpenGL ES 1.1 Compatible | ||
| + | 512-depth instruction memory | ||
| + | 256 Vector Input/Constant Registers | ||
| + | 16 Vector General Purpose Registers | ||
| + | 2x2 Sub-Pixel Accuracy | ||
| + | Per-Pixel Fogging | ||
| + | Hardware Dithering | ||
| − | + | Texture Features | |
| − | + | *Perspective Correction | |
| − | + | *Multi-Texturing | |
| − | + | *Bi-Linear Filtering | |
| − | + | *MIPMAP | |
| − | + | ||
| − | + | ||
| − | + | ||
| − | + | ||
| − | + | ||
| − | + | ||
| − | + | ||
| − | + | ||
=== Display Subsystem === | === Display Subsystem === | ||
| − | + | ||
| − | * | + | Onboard TFT controller |
| − | + | * Support for screens with a size up to 1280 * 1024@60Hz | |
| + | * Supports Flat Panel I/F: Color TFT at 16, 18, 24 bit//Pixel, STN-LCD | ||
** Display Layers | ** Display Layers | ||
*** RGB Layer : 2 Layer, 8/16/24bpp Format | *** RGB Layer : 2 Layer, 8/16/24bpp Format | ||
| Line 77: | Line 82: | ||
*** CVBS Output | *** CVBS Output | ||
*** Independent Dual Display Output | *** Independent Dual Display Output | ||
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| − | |||
| + | === Integrated peripherals === | ||
| + | ==== USB ==== | ||
| + | USB Host 1.1 | ||
| + | *3 downstream ports | ||
| − | + | USB 2.0 Device | |
| − | + | *Support FS/HS dual mode operation | |
| − | * | + | |
| − | + | ==== I2C interface ==== | |
| − | + | 2 channel I2C-bus | |
| − | + | 100Kbps ~ 1Mbps Speed | |
| − | + | ||
| − | + | ||
| − | + | ==== Other ==== | |
| − | + | 4Ch UART, | |
| − | + | SSP/ SPI interface | |
| − | + | ADC | |
| + | PWM | ||
| + | JTAG | ||
Revision as of 01:14, 27 February 2010
Contents |
Summary
OEM branded version of the MagicEyes Pollux VF3520F Datasheet
Features
Core
ARM926EJ-S- 393MHz
- 16KByte I-Cache
- 16KByte D-Cache
90 nm Process
288pin FBGA
15mm x 15mm
0.65mm pitch
High performance 32bit CPU Core
Jazelle Java Hardware Accelerator
Memory
DDR SDRAM Controller
- 133MHz DDR SDRAM memory x 16bit
- Single DDR memory bank
- Up to 128MB
- Peak Memory Bandwidth : 533MByte/sec
8 Channel DMA
Storage
Static Bus controller 16 bit data bus 8 bit NAND flash and 8/16 bit SRAM Support SLC/ MLC NAND Support Boot form NAND flash NOR flash IDE interface with PIO mode
SD/ MMC interface
Two Channels of SD/MMC SD mem Version 2.00 SDIO version 1.10 MMC version 4.2 clock speed up to 52MHz PIO and DMA mode data transfer
3D Graphic Accelerator
3D Performance : 133M Texel/sec, 1.33M Polygon/sec OpenGL ES 1.1 Compatible 512-depth instruction memory 256 Vector Input/Constant Registers 16 Vector General Purpose Registers 2x2 Sub-Pixel Accuracy Per-Pixel Fogging Hardware Dithering
Texture Features
- Perspective Correction
- Multi-Texturing
- Bi-Linear Filtering
- MIPMAP
Display Subsystem
Onboard TFT controller
- Support for screens with a size up to 1280 * 1024@60Hz
- Supports Flat Panel I/F: Color TFT at 16, 18, 24 bit//Pixel, STN-LCD
- Display Layers
- RGB Layer : 2 Layer, 8/16/24bpp Format
- YUV Layer : YUV4:2:0, 2D/Linear Format, Scale Up/Down
- Effects : Color Key, Priority, Alpha Blending(16 Levels)
- Color Control : Brightness, Contrast, Hue, Saturation
- Output Format
- CCIR 601/656, RGB, M-RGB(Multiplexed RGB)
- Supports NTSC/PAL Encoder with Analog DAC
- CVBS Output
- Independent Dual Display Output
- Display Layers
Integrated peripherals
USB
USB Host 1.1
- 3 downstream ports
USB 2.0 Device
- Support FS/HS dual mode operation
I2C interface
2 channel I2C-bus 100Kbps ~ 1Mbps Speed
Other
4Ch UART, SSP/ SPI interface ADC PWM JTAG
Power Management
- Individual block dynamic power controlller
- Supports various power down mode
- Idle
- Stop
Operating Temperature
- 0℃ ~ 70℃
Operating System
- Microsoft Windows CE 5.0/6.0
- Linux