Difference between revisions of "Minnowboard:MinnowMaxCoreboot"

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(added code blocks)
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* make
 
* make
 
* ncurses-dev
 
* ncurses-dev
 +
* flex
 +
* bison
  
 
= Get sources and tools =
 
= Get sources and tools =
 
NOTE: for simplicity, put all downloads and items extracted into the same directory.  
 
NOTE: for simplicity, put all downloads and items extracted into the same directory.  
 
=== Coreboot ===
 
=== Coreboot ===
* git clone http://review.coreboot.org/p/coreboot
+
git clone http://review.coreboot.org/p/coreboot
* cd coreboot
+
cd coreboot
* git submodule update --init --checkout
+
git submodule update --init --checkout
* git checkout b9a0809faeeef67e46cda17cf8f7a839c6fe614c
+
git checkout b9a0809faeeef67e46cda17cf8f7a839c6fe614c
 
* Download [http://www.elinux.org/images/c/cd/Minnowboard_Max_Coreboot_config.txt config]
 
* Download [http://www.elinux.org/images/c/cd/Minnowboard_Max_Coreboot_config.txt config]
  
Line 29: Line 31:
 
= Setup =
 
= Setup =
 
=== FSP ===
 
=== FSP ===
* cd bct
+
cd bct
* ./bct --bin ../BAY_TRAIL_FSP_KIT/FSP/BAYTRAIL_FSP_GOLD_002_10-JANUARY-2014.fd  --absf ../coreboot/src/vendorcode/intel/fsp/baytrail/absf/minnowmax_2gb.absf --bout ../minnowboard-max.fsp
+
./bct --bin ../BAY_TRAIL_FSP_KIT/FSP/BAYTRAIL_FSP_GOLD_002_10-JANUARY-2014.fd  --absf ../coreboot/src/vendorcode/intel/fsp/baytrail/absf/minnowmax_2gb.absf --bout ../minnowboard-max.fsp
 
** If you have a single core Minnowboard Max, change minnowmax_2gb.absf to minnowmax_1gb.absf
 
** If you have a single core Minnowboard Max, change minnowmax_2gb.absf to minnowmax_1gb.absf
 
** DO NOT USE THE GUI. THE GUI DOES NOT WORK ON ALL LINUX DISTROS AND IS NOT NECESSARY FOR THIS.
 
** DO NOT USE THE GUI. THE GUI DOES NOT WORK ON ALL LINUX DISTROS AND IS NOT NECESSARY FOR THIS.
* cd ..
+
cd ..
 
=== TXE and SPI descriptor ===
 
=== TXE and SPI descriptor ===
 
Build ifdtool within the coreboot directory
 
Build ifdtool within the coreboot directory
  
* cd coreboot/util/ifdtool
+
cd coreboot/util/ifdtool
* make
+
make
* cd ../../../
+
cd ../../../
  
 
Download the original firmware binary [http://firmware.intel.com/sites/default/files/2014-WW42.4-MinnowBoardMax.73-64-bit.bin_Release.zip here]
 
Download the original firmware binary [http://firmware.intel.com/sites/default/files/2014-WW42.4-MinnowBoardMax.73-64-bit.bin_Release.zip here]
  
* unzip -d maxfirmware 2014-WW42.4-MinnowBoardMax.73-64-bit.bin_Release.zip
+
unzip -d maxfirmware 2014-WW42.4-MinnowBoardMax.73-64-bit.bin_Release.zip
* cd maxfirmware
+
cd maxfirmware
  
 
Run ifdtool to extract the TXE and SPI descriptor from the firmware image
 
Run ifdtool to extract the TXE and SPI descriptor from the firmware image
* ../coreboot/util/ifdtool/ifdtool -x MNW2MAX1.X64.0073.R02.1409160934.bin
+
../coreboot/util/ifdtool/ifdtool -x MNW2MAX1.X64.0073.R02.1409160934.bin
  
 
You should now have 4 files starting with flashregion_
 
You should now have 4 files starting with flashregion_
 
Link flashregion_0_flashdescriptor.bin to descriptor.bin
 
Link flashregion_0_flashdescriptor.bin to descriptor.bin
*ln -s flashregion_0_flashdescriptor.bin descriptor.bin
+
ln -s flashregion_0_flashdescriptor.bin descriptor.bin
 
Link flashregion_1_bios.bin to txe.bin
 
Link flashregion_1_bios.bin to txe.bin
*ln -s flashregion_1_bios.bin txe.bin
+
ln -s flashregion_1_bios.bin txe.bin
  
 
=== Coreboot ===
 
=== Coreboot ===
* cd coreboot
+
cd coreboot
 
* in src/soc/intel/fsp_baytrail/Kconfig line 127, change 'string' to 'string "ME PATH"'
 
* in src/soc/intel/fsp_baytrail/Kconfig line 127, change 'string' to 'string "ME PATH"'
* make menuconfig
+
make menuconfig
 
* load provided config
 
* load provided config
 
* save config to .config
 
* save config to .config
Line 65: Line 67:
  
 
= Building =
 
= Building =
* make crossgcc
+
make crossgcc
* make
+
make
 
* The firmware produced is build/coreboot.rom
 
* The firmware produced is build/coreboot.rom
  
 
= Building without TXE/SPI descriptor =
 
= Building without TXE/SPI descriptor =
* make menuconfig
+
make menuconfig
 
** Set Chipset -> Include the TXE to No
 
** Set Chipset -> Include the TXE to No
* make crossgcc
+
make crossgcc
* make
+
make
 
* When flashing the firmware, only flash the last 3MB of the 8 MB image onto the last 3MB of the chip
 
* When flashing the firmware, only flash the last 3MB of the 8 MB image onto the last 3MB of the chip
 
** Example command using flashrom and a dediprog: echo 00500000:007fffff coreboot > regions.txt ; sudo flashrom -p dediprog -l regions.txt -i coreboot -w coreboot.rom
 
** Example command using flashrom and a dediprog: echo 00500000:007fffff coreboot > regions.txt ; sudo flashrom -p dediprog -l regions.txt -i coreboot -w coreboot.rom
 
* If you accidentally overwrite the first half, you will need to reflash the original firmware, which is available [https://uefidk.com/content/minnowboard-max here].
 
* If you accidentally overwrite the first half, you will need to reflash the original firmware, which is available [https://uefidk.com/content/minnowboard-max here].

Revision as of 10:03, 21 January 2015

This page gives a step by step guide to building coreboot for the Minnowboard Max.

Requirements

  • gcc
  • git
  • make
  • ncurses-dev
  • flex
  • bison

Get sources and tools

NOTE: for simplicity, put all downloads and items extracted into the same directory.

Coreboot

git clone http://review.coreboot.org/p/coreboot
cd coreboot
git submodule update --init --checkout
git checkout b9a0809faeeef67e46cda17cf8f7a839c6fe614c

FSP

  • Download FSP archive
  • extract from archive
  • follow instructions in Readme_Extract to extract FSP

Binary Configuration Tool

  • Download BCT archive
  • extract archive from archive
  • extract from archive

Setup

FSP

cd bct
./bct --bin ../BAY_TRAIL_FSP_KIT/FSP/BAYTRAIL_FSP_GOLD_002_10-JANUARY-2014.fd  --absf ../coreboot/src/vendorcode/intel/fsp/baytrail/absf/minnowmax_2gb.absf --bout ../minnowboard-max.fsp
    • If you have a single core Minnowboard Max, change minnowmax_2gb.absf to minnowmax_1gb.absf
    • DO NOT USE THE GUI. THE GUI DOES NOT WORK ON ALL LINUX DISTROS AND IS NOT NECESSARY FOR THIS.
cd ..

TXE and SPI descriptor

Build ifdtool within the coreboot directory

cd coreboot/util/ifdtool
make
cd ../../../

Download the original firmware binary here

unzip -d maxfirmware 2014-WW42.4-MinnowBoardMax.73-64-bit.bin_Release.zip
cd maxfirmware

Run ifdtool to extract the TXE and SPI descriptor from the firmware image

../coreboot/util/ifdtool/ifdtool -x MNW2MAX1.X64.0073.R02.1409160934.bin

You should now have 4 files starting with flashregion_ Link flashregion_0_flashdescriptor.bin to descriptor.bin

ln -s flashregion_0_flashdescriptor.bin descriptor.bin

Link flashregion_1_bios.bin to txe.bin

ln -s flashregion_1_bios.bin txe.bin

Coreboot

cd coreboot
  • in src/soc/intel/fsp_baytrail/Kconfig line 127, change 'string' to 'string "ME PATH"'
make menuconfig
  • load provided config
  • save config to .config
  • If you have a single core Minnowboard Max, change "Mainboard" -> "Memory SKU to build" to 1GB
  • Set "Chipset" -> "ME PATH" to the directory containing TXE and SPI descriptor(../maxfirmware)

Building

make crossgcc
make
  • The firmware produced is build/coreboot.rom

Building without TXE/SPI descriptor

make menuconfig
    • Set Chipset -> Include the TXE to No
make crossgcc
make
  • When flashing the firmware, only flash the last 3MB of the 8 MB image onto the last 3MB of the chip
    • Example command using flashrom and a dediprog: echo 00500000:007fffff coreboot > regions.txt ; sudo flashrom -p dediprog -l regions.txt -i coreboot -w coreboot.rom
  • If you accidentally overwrite the first half, you will need to reflash the original firmware, which is available here.