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Difference between revisions of "NaviEngine"

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* [ NaviEngine 1, System LSI for SMP-Based Car Navigation Systems]
* [ NaviEngine 1, System LSI for SMP-Based Car Navigation Systems]
* [ NaviEngine Multicore Platform and its role in the evolution of car navigation systems]
* [ K2L MOST starter kit for NaviEngine]

Revision as of 13:54, 16 August 2009

NEC's NaviEngine 1 is a SoC product based on ARM's ARM11MPCore. It's for car navigation systems that adopts the SMP (Symmetrical Multicore Processor). The chip delivers high-speed parallel processing performance of up to 1920MIPS at 400 MHz. In addition, NaviEngine1 has 2D and 3D graphics using the POWERVR SGX 535 graphics core by Imagination Technologies. Volume production is scheduled to begin in March 2009.



A block diagram shows the internals of NaviEngine1 chip.

Eval board

An evaluation board (board in the middle with the fan) is available:

  • NEC uPD35001 System-on-chip (ARM11 MPCore x4)
  • DDR2 SDRAM (256MB)
  • NOR Flash memory (64MB)
  • NAND Flash memory (256MB)
  • Three on-chip UARTs
  • LAN9118 Ethernet adapter
  • On-chip LCD controller
  • USBH2.0, ATA6, PCI, CSI, SPDIF, I2S, etc


Operating systems

The following operating systems are running on NaviEngine:

Demo running eT-Kernel on one CPU and WinCE on the three other ARM11 cores. Demonstrates graphic performance, too.


QEMU emulation for NaviEngine is part of 2008.05 OpenSolaris. It emulates

  • DDR2 SDRAM (256MB)
  • NOR Flash memory (64MB)
  • Three on-chip UARTs

See OpenSolaris release note section 1.2 Architecture for details and OpenSolaris installation section 6.1 Setup QEMU.