OMAP wishlist

Pin-mux framework

Feature list

• dynamic, run-time alloc/free of pins
• handle various SoCs: 34xx, 35xx including the various packages of 35xx
• IP based Revision and errata handling framework
• capability for I2C to handle board+bus based timing parameters (SCLL and SLH)

References

PXA

PXA uses MFP (Multi-Function Pin) framework for pin multiplexing. Brief MFP description can be found at Documentation/arm/pxa/mfp.txt.

The concept of MFP is as follows:

• There's an enumeration of all possible configurable pins.
• The enumeration values are used as indexes to the mfp_table that defines pin configuration register address and pin configuration for active and low power modes. The table entries are quite similar to OMAP's pin_config, and the mfp_table is much like omapXXXX_pins[]. The main difference is that omapXXXX_pins[] tries to define all possible mux modes and the mfp_table has exactly one entry for a pin.
• Possible pin configurations are encoded together with pin enumeration index with a set of a macros, e.g

#define GPIO32_UART1_CTS    MFP_CFG_LPM(GPIO32,  AF2, FLOAT)
#define GPIO32_UART1_RTS    MFP_CFG_LPM(GPIO32,  AF4, FLOAT)
#define GPIO32_UTM_PHYDATA_2       MFP_CFG(GPIO32,  AF3)
#define GPIO32_USB_P2_4            MFP_CFG(GPIO32, AF1)

• Processor initialization code sets pin configuration register addresses in the mfp_table for all pins present of the CPU variant
• Board initialization code uses MFP API to set actual pin configuration both in the mfp_table and in the pin configuration registers, e.g :

static mfp_cfg_t cm_x300_mfp_cfg[] __initdata = {
	/* LCD */
	GPIO54_LCD_LDD_0,
	GPIO55_LCD_LDD_1,
	GPIO56_LCD_LDD_2,
	GPIO57_LCD_LDD_3,

	/* BTUART */
	GPIO111_UART2_RTS,
	GPIO112_UART2_RXD | MFP_LPM_EDGE_FALL,
	GPIO113_UART2_TXD,
	GPIO114_UART2_CTS | MFP_LPM_EDGE_BOTH,

	/* STUART */
	GPIO109_UART3_TXD,
	GPIO110_UART3_RXD | MFP_LPM_EDGE_FALL,
}

static void __init machine_init_func(void)
{
	pxa3xx_mfp_config(ARRAY_AND_SIZE(cm_x300_mfp_cfg));
        ...
}