Difference between revisions of "OpenOCD Snowball"

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== Introduction ==
+
= Introduction =
The Snowball is supported on main branch of http://openocd.sourceforge.net.<br>
+
OpenOCD mainline includes preliminary support for Cortex-A9 and Snowball.  See the [[Compiling_OpenOCD]] for instructions to checkout and build from source, or visit [http://openocd.sourceforge.net/ OpenOCD homepage].<br>
 
For using this solution, you need at least:<br>
 
For using this solution, you need at least:<br>
 
- a usb jtag dongle,<br>
 
- a usb jtag dongle,<br>
- an openocd excutable running on linux host machine,<br>
+
- an openocd excutable running on a host machine,<br>
 
- a gdb cross compile for arm platform.<br>
 
- a gdb cross compile for arm platform.<br>
  
 
[[Eclipse]] can be used as a [[GDB]] front end.<br>
 
[[Eclipse]] can be used as a [[GDB]] front end.<br>
  
 +
= JTAG Hardware HowTos =
 
Following list provides some usb dongle that have tested with snowball :<br>
 
Following list provides some usb dongle that have tested with snowball :<br>
 
* [http://www.amontec.com/jtagkey2.shtml Amontec JTAGKey2]<br>
 
* [http://www.amontec.com/jtagkey2.shtml Amontec JTAGKey2]<br>
Line 15: Line 16:
 
The openocd application is available in source code. Follow the following step, for building the application.
 
The openocd application is available in source code. Follow the following step, for building the application.
  
The source are accessible from a repository git.
+
= Known Issues =
Due to proxy issue, add in your .bashrc the following lines :
 
function set_proxy
 
{
 
                local NAME=`zenity --entry --text="Proxy Username" | xargs echo -n`
 
                local SECRET=`zenity --entry --text="Proxy Password" --hide-text |  xargs echo -n`
 
                export PROXY_SECRET=$NAME:$SECRET
 
                export http_proxy="http://$NAME:$SECRET@your_compagny_proxy"
 
}
 
  
Execute following command for cloning openocd from the http server.
+
== While power saving is enabled, the openocd polling is failing because dap is not powered? ==
$ bash
 
$ set_proxy
 
$ git clone http://repo.or.cz/r/openocd.git
 
$ cd openocd
 
$ ./bootstrap
 
 
 
The script "bootstrap" clones a sub module  jimtcl from http://repo.or.cz/r/jimtcl.git
 
 
 
 
 
Install libftdi-dev
 
$sudo apt-get install libftdi-dev '''
 
 
 
Configure package
 
$./configure --enable-ft2232_libftdi
 
 
 
Build
 
$make
 
 
 
==FAQ==
 
===Version.texi creates an error at link?===
 
 
 
Create file openocd/doc/version.texi with following content.<br>
 
 
 
@set UPDATED 29 december 2010
 
@set UPDATED-MONTH december 2010
 
@set EDITION 0.x.0
 
@set VERSION 0.x.0
 
 
 
and:
 
$make
 
Connect the usb dongle to snowball as shown in following picture.<br>
 
(HE10 connector ARM 20 pinning)<br>
 
[[File:openocd_connection.jpg |304x228px]]<br>
 
Execute the built version :<br>
 
In directory openocd/tcl execute following command :
 
For a olimex usb dongle :
 
$../src/openocd -f interface/olimex-arm-usb-ocd.cfg -c "set MAXSPEED 5000" -f target/u8500.cfg
 
For a jtagkey2 usb dongle:
 
$../src/openocd -f interface/jtagkey2.cfg -f target/u8500.cfg
 
../src/openocd -f interface/jtagkey2.cfg -f target/u8500.cfg
 
Open On-Chip Debugger 0.6.0-dev-00220-g9e1a166 (2011-11-14-10:46)
 
Licensed under GNU GPL v2
 
For bug reports, read
 
Http://openocd.sourceforge.net/doc/doxygen/bugs.html
 
Info : only one transport option; autoselect 'jtag'
 
Warn : u8500.dap: nonstandard IR value
 
Warn : u8500.jrc: nonstandard IR value
 
15000 kHz
 
force hard breakpoints
 
jtag_ntrst_delay: 100
 
trst_and_srst combined srst_gates_jtag trst_push_pull srst_open_drain
 
Info : max TCK change to: 30000 kHz
 
Info : clock speed 15000 kHz
 
Info : JTAG tap: u8500.jrc tap/device found: 0x52286041 (mfg: 0x020, part: 0x2286,  ver: 0x5)
 
Error: u8500.jrc: IR capture error; saw 0x01 not 0x06
 
Warn : Bypassing JTAG setup events due to errors
 
 
 
In a separate console, connect the openocd console.
 
$telnet localhost 4444
 
Trying ::1...
 
Trying 127.0.0.1...
 
Connected to localhost.
 
Escape character is '^]'.
 
Open On-Chip Debugger
 
Reset and run the targets.
 
> rst_run
 
JTAG tap: u8500.jrc tap/device found: 0x52286041 (mfg: 0x020, part: 0x2286, ver: 0x5)
 
u8500.jrc: IR capture error; saw 0x01 not 0x06
 
Bypassing JTAG setup events due to errors
 
JTAG tap: u8500.jrc tap/device found: 0x52286041 (mfg: 0x020, part: 0x2286, ver: 0x5)
 
u8500.jrc: IR capture error; saw 0x01 not 0x06
 
Bypassing JTAG setup events due to errors
 
secsts1 =C3D7
 
ape debugable
 
JTAG tap: u8500.dap enabled
 
Invalid ACK 0x4 in JTAG-DP transaction
 
Invalid ACK 0x4 in JTAG-DP transaction
 
u8500.cpu1: hardware has 6 breakpoints, 4 watchpoints
 
u8500.cpu2: hardware has 6 breakpoints, 4 watchpoints
 
ap 1 selected, identification register 0x24770002
 
Halt the targets.
 
> halt
 
number of cache level 1
 
u8500.cpu1 cluster 3 core 0 multi core
 
target state: halted
 
target halted in ARM state due to debug-request, current mode: Supervisor
 
cpsr: 0x60000093 pc: 0xc0073e9c
 
MMU: enabled, D-Cache: enabled, I-Cache: enabled
 
number of cache level 1
 
u8500.cpu2 cluster 3 core 1 multi core
 
target state: halted
 
target halted in ARM state due to debug-request, current mode: Supervisor
 
cpsr: 0x60000093 pc: 0xc0073e9c
 
MMU: enabled, D-Cache: enabled, I-Cache: enabled
 
>
 
===While power saving is enabled, the openocd polling is failing because dap is not powered?===
 
  
 
Apply following patch to openocd and rebuild.
 
Apply following patch to openocd and rebuild.
Line 175: Line 72:
 
  --  
 
  --  
 
  1.7.4.1
 
  1.7.4.1
 
 
Create a file 0001-remove-warning-when-board-in-sleep.patch with patch content.
 
$git am 0001-remove-warning-when-board-in-sleep.patch
 
$make
 
 
 
Here is the list of some openocd command for full description, build pdf doc.
 
$make pdf
 
A file doc/openocd.pdf is created 
 
----
 
 
"'''jtag arp_init'''"&nbsp;: disable all tap from scan chain expect u8500.tapc
 
 
----
 
 
"'''reset'''"&nbsp;: reset chipset<br>
 
 
----
 
 
"'''scan_chain'''"&nbsp;: display the element in the scan chain<br>
 
> scan_chain
 
    TapName            Enabled  IdCode    Expected  IrLen IrCap IrMask
 
-- ------------------- -------- ---------- ---------- ----- ----- ------
 
  0 u8500.dap              Y    0x00000000 0x4ba00477    4 0x0e  0x0f
 
  1 u8500.jrc              Y    0x52286041 0x*2286041    6 0x06  0x0f
 
 
 
'''Enabled'''&nbsp;: "'''y'''" means tap is present on scan chain<br>
 
 
'''Irlen'''&nbsp;: indicates tap len
 
 
'''Ircap'''&nbsp;: the instruction register address&nbsp; to use for reading tap ID
 
 
'''Expected'''&nbsp;: Expected tap id value
 
 
'''Idcode'''&nbsp;: Tap Id read, at tap insertion.<br>
 
 
----
 
 
"'''targets'''"&nbsp;: display the status of the targets as shown below<br>
 
> targets
 
    TargetName        Type      Endian TapName            State     
 
--  ------------------ ---------- ------ ------------------ ------------
 
  0* u8500.cpu1        cortex_a8  little u8500.dap          running
 
  1  u8500.cpu2        cortex_a8  little u8500.dap          running
 
 
"*" indicates the current target<br>
 
 
----
 
 
"'''targets u8500.cpu2'''"&nbsp;: change current target to u8500.cpu2<br>
 
> targets u8500.cpu2
 
> targets
 
    TargetName        Type      Endian TapName            State     
 
--  ------------------ ---------- ------ ------------------ ------------
 
  0  u8500.cpu1        cortex_a8  little u8500.dap          running
 
  1* u8500.cpu2        cortex_a8  little u8500.dap          running
 
 
----
 
 
"'''poll'''"&nbsp;: display wether the regulary targets polling is activated or not.<br>
 
 
----
 
 
"'''poll on'''": launch regulary targets polling.<br>
 
 
----
 
 
"'''poll off'''": stop regular target polling, in this state , the status displayed by command "'''targets'''" is no more reflecting the real target status.<br>
 
 
----
 
 
"'''halt'''"&nbsp;: request a halt of current target.<br>
 
 
"'''resume'''"&nbsp;: resume current target (targets reaches "running" status).
 
 
----
 
 
"'''reg'''"&nbsp;: display all register of current target.<br>
 
 
'''"reg pc'''" display PC register of current target.<br>
 
 
"'''reg r1 0x3'''" set r1 register to 0x3 of current target.<br>
 
 
----
 
 
"'''bp'''"&nbsp;: list the breakpoint hw of current target.
 
 
----
 
 
"'''bp 0x0 4 hw'''"&nbsp;: set on current target an hw breakpoint on 0x0.
 
 
"'''rpb 0x0'''"&nbsp;: remove on current target the breakpoint on 0x0.<br>
 
 
----
 
 
"'''mdb 0xC0000000 4" '''dump 4 bytes of memory at address 0xc0000000. (virtual address if mmu on)
 
 
"'''mwb 0xc00000000 4'''" write 4 in memory address 0xc0000000.<br>
 
 
In ST-Ericsson OpenOCD Cortex A9 implementation, target need to be halted, access is done the cp14&nbsp;of selected target.
 
 
----
 
 
"'''mdb phys 0x0 4" '''dump 4 bytes of memory at address 0x000000. (physical address)
 
 
> mdb phys 0 4
 
Wait flushing data l1 on core 1
 
Wait flushing data l1 on core 0
 
0x00000000: 03 20 c2 c0
 
>
 
 
----
 
 
'''"shutdown"'''&nbsp;: kill openocd daemon.
 
 
----
 
  
<br>
+
== SMP Support ==
For debugging uboot or linux, you need to build gdb.
 
Download the gdb-7.3a.tar.gz  at following address. <br>
 
http://ftp.gnu.org/gnu/gdb/<br>
 
Create a specific directory for this gdb built.(later on, we apply a patch for smp full support)
 
gunzip gdb-7.3a.tar.gz
 
tar xvf gdb-7.3.tar
 
cd gdb-7.3
 
git init
 
git add *
 
git commit -m gdb-7.3a
 
./configure --target=arm-none-linux-gnueabi
 
make all
 
cd ./gdb
 
./gdb
 
GNU gdb (GDB) 7.3
 
Copyright (C) 2011 Free Software Foundation, Inc.
 
License GPLv3+: GNU GPL version 3 or later <http://gnu.org/licenses/gpl.html>
 
This is free software: you are free to change and redistribute it.
 
There is NO WARRANTY, to the extent permitted by law.  Type "show copying"
 
and "show warranty" for details.
 
This GDB was configured as "--host=x86_64-unknown-linux-gnu --target=arm-none-linux-gnueabi".
 
For bug reporting instructions, please see:
 
<http://www.gnu.org/software/gdb/bugs/>.
 
 
   
 
   
 
Apply the following patch for smp support.
 
Apply the following patch for smp support.
Line 423: Line 179:
 
[[Category:OpenOCD]]
 
[[Category:OpenOCD]]
 
[[Category:Snowball]]
 
[[Category:Snowball]]
 +
[[Category:Debugging]]

Latest revision as of 09:50, 16 May 2012

Introduction

OpenOCD mainline includes preliminary support for Cortex-A9 and Snowball. See the Compiling_OpenOCD for instructions to checkout and build from source, or visit OpenOCD homepage.
For using this solution, you need at least:
- a usb jtag dongle,
- an openocd excutable running on a host machine,
- a gdb cross compile for arm platform.

Eclipse can be used as a GDB front end.

JTAG Hardware HowTos

Following list provides some usb dongle that have tested with snowball :

The openocd application is available in source code. Follow the following step, for building the application.

Known Issues

While power saving is enabled, the openocd polling is failing because dap is not powered?

Apply following patch to openocd and rebuild.

From c3ab72ab20273a54e9f47fce05cedf159847a33d Mon Sep 17 00:00:00 2001
From: Michel Jaouen <michel.jaouen@stericsson.com>
Date: Tue, 26 Jul 2011 11:16:29 +0200
Subject: [PATCH] remove warning when board in sleep

---
 src/target/adi_v5_jtag.c |    8 ++++----
 src/target/cortex_a.c    |    2 +-
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/src/target/adi_v5_jtag.c b/src/target/adi_v5_jtag.c
index 75461c3..eb9627d 100644
--- a/src/target/adi_v5_jtag.c
+++ b/src/target/adi_v5_jtag.c
@@ -296,9 +296,9 @@ static int jtagdp_transaction_endcheck(struct adiv5_dap *dap)
 					dap->ap_csw_value,
 					dap->ap_tar_value);
 
-			if (ctrlstat & SSTICKYORUN)
-				LOG_ERROR("JTAG-DP OVERRUN - check clock, "
-					"memaccess, or reduce jtag speed");
+			//if (ctrlstat & SSTICKYORUN)
+			//	LOG_ERROR("JTAG-DP OVERRUN - check clock, "
+			//		"memaccess, or reduce jtag speed");
 
 			if (ctrlstat & SSTICKYERR)
 				LOG_ERROR("JTAG-DP STICKY ERROR");
@@ -331,7 +331,7 @@ static int jtagdp_transaction_endcheck(struct adiv5_dap *dap)
 
 			if ((retval = dap_run(dap)) != ERROR_OK)
 				return retval;
-			LOG_ERROR("MEM_AP_CSW 0x%" PRIx32 ", MEM_AP_TAR 0x%"
+			LOG_DEBUG("MEM_AP_CSW 0x%" PRIx32 ", MEM_AP_TAR 0x%"
 					PRIx32, mem_ap_csw, mem_ap_tar);
 
 		}
diff --git a/src/target/cortex_a.c b/src/target/cortex_a.c
index 2370d95..1223087 100755
--- a/src/target/cortex_a.c
+++ b/src/target/cortex_a.c
@@ -844,7 +844,7 @@ static int cortex_a8_poll(struct target *target)
 			armv7a->debug_base + CPUDBG_DSCR, &dscr);
 	if (retval != ERROR_OK)
 	{
-		return retval;
+		return ERROR_OK;
 	}
 	cortex_a8->cpudbg_dscr = dscr;
 
-- 
1.7.4.1

SMP Support

Apply the following patch for smp support.

From 3c35988a8dd4e6c1a18b7156bc1367258e9e2fb9 Mon Sep 17 00:00:00 2001
From: Michel Jaouen <michel.jaouen@stericsson.com>
Date: Fri, 30 Sep 2011 14:45:21 +0200
Subject: [PATCH] OpenOCD : add smp remote protocol message

---
 gdb/remote.c |   71 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++-
 1 files changed, 70 insertions(+), 1 deletions(-)

diff --git a/gdb/remote.c b/gdb/remote.c
index 243bdd7..7ce402e 100644
--- a/gdb/remote.c
+++ b/gdb/remote.c
@@ -10552,6 +10552,72 @@ remote_upload_trace_state_variables (struct uploaded_tsv **utsvp)
     }
   return 0;
 }
+#define OPENOCD_SMP
+#ifdef OPENOCD_SMP
+static int dummy = 0;
+static int get_core(void)
+{
+	struct remote_state *rs = get_remote_state ();
+	int core = -1;
+	if (!remote_desc)
+    error (_("command can only be used with remote target"));
+	if (remote_desc)
+	{
+		//puts_filtered("sending jc\n");
+		putpkt("jc");
+		//puts_filtered("Jc sent\n");
+		getpkt(&rs->buf, &rs->buf_size, 0);
+		//		print_packet (rs->buf);
+		hex2bin(rs->buf,(gdb_byte *)&core,4);
+	}
+	else return dummy;
+	return core;
+}
+
+static int set_core(int core)
+{
+	char tmp[16];
+	struct remote_state *rs = get_remote_state ();
+	dummy = core;
+	if (!remote_desc)
+    error (_("command can only be used with remote target"));
+	else	{
+		sprintf(tmp,"Jc%x",core);
+		//puts_filtered(tmp);
+		putpkt(tmp);
+		getpkt (&rs->buf, &rs->buf_size, 0);
+	}
+	return 0;
+}
+
+static void smp_value_read (struct value *v)
+{
+	int core = get_core();
+	memcpy (value_contents_all_raw (v),
+			&core,
+			4);
+}
+
+static void smp_value_write (struct value *v, struct value * from)
+{
+	int core;
+	memcpy (&core,value_contents_all_raw (from), 4);
+	set_core(core);
+}
+
+static struct lval_funcs smp_value_funcs = { smp_value_read, smp_value_write };
+
+
+
+static struct value *smp_make_value (struct gdbarch *gdbarch,
+		struct internalvar *var)
+{
+	struct type *type = arch_integer_type (gdbarch, 32, 1, "DWORD32");
+    return allocate_computed_value (type, &smp_value_funcs, NULL);
+}
+#endif
+
+
 
 void
 _initialize_remote (void)
@@ -10559,7 +10625,10 @@ _initialize_remote (void)
   struct remote_state *rs;
   struct cmd_list_element *cmd;
   char *cmd_name;
-
+  /* smp specific  */
+#ifdef OPENOCD_SMP
+  create_internalvar_type_lazy ("_core", smp_make_value);
+#endif
   /* architecture specific data */
   remote_gdbarch_data_handle =
     gdbarch_data_register_post_init (init_remote_state);
-- 
1.7.4.1