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		<id>http://elinux.org/index.php?title=PPC405_GP&amp;feed=atom&amp;action=history</id>
		<title>PPC405 GP - Revision history</title>
		<link rel="self" type="application/atom+xml" href="http://elinux.org/index.php?title=PPC405_GP&amp;feed=atom&amp;action=history"/>
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		<updated>2013-05-22T06:04:46Z</updated>
		<subtitle>Revision history for this page on the wiki</subtitle>
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	<entry>
		<id>http://elinux.org/index.php?title=PPC405_GP&amp;diff=209360&amp;oldid=prev</id>
		<title>Jwdietrich at 20:08, 9 January 2013</title>
		<link rel="alternate" type="text/html" href="http://elinux.org/index.php?title=PPC405_GP&amp;diff=209360&amp;oldid=prev"/>
				<updated>2013-01-09T20:08:27Z</updated>
		
		<summary type="html">&lt;p&gt;&lt;/p&gt;
&lt;table class='diff diff-contentalign-left'&gt;
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			&lt;td colspan='2' style=&quot;background-color: white; color:black;&quot;&gt;← Older revision&lt;/td&gt;
			&lt;td colspan='2' style=&quot;background-color: white; color:black;&quot;&gt;Revision as of 20:08, 9 January 2013&lt;/td&gt;
			&lt;/tr&gt;&lt;tr&gt;&lt;td colspan=&quot;2&quot; class=&quot;diff-lineno&quot;&gt;Line 9:&lt;/td&gt;
&lt;td colspan=&quot;2&quot; class=&quot;diff-lineno&quot;&gt;Line 9:&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background: #eee; color:black; font-size: smaller;&quot;&gt;&lt;div&gt;General Description&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background: #eee; color:black; font-size: smaller;&quot;&gt;&lt;div&gt;General Description&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background: #eee; color:black; font-size: smaller;&quot;&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background: #eee; color:black; font-size: smaller;&quot;&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;−&lt;/td&gt;&lt;td style=&quot;background: #ffa; color:black; font-size: smaller;&quot;&gt;&lt;div&gt;405GP/GPR Product Photo The AMCC PowerPC 405GP and 405GPr family of 32-bit RISC processors is designed to provide a flexible, fast time-to- market hardware solution to satisfy the demands of high-performance embedded applications. Implemented in the scalable PowerPC architecture, the 405GP and 405GPr processors maintain code compatibility with other PowerPC processors for ease in migration and faster time-to-market. An optimized balance of performance, low power, and features makes them ideal solutions for communication, data storage, and pervasive computing applications.&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;+&lt;/td&gt;&lt;td style=&quot;background: #cfc; color:black; font-size: smaller;&quot;&gt;&lt;div&gt;405GP/GPR Product Photo The AMCC &lt;ins class=&quot;diffchange diffchange-inline&quot;&gt;[[&lt;/ins&gt;PowerPC&lt;ins class=&quot;diffchange diffchange-inline&quot;&gt;]] &lt;/ins&gt;405GP and 405GPr family of 32-bit RISC processors is designed to provide a flexible, fast time-to- market hardware solution to satisfy the demands of high-performance embedded applications. Implemented in the scalable PowerPC architecture, the 405GP and 405GPr processors maintain code compatibility with other PowerPC processors for ease in migration and faster time-to-market. An optimized balance of performance, low power, and features makes them ideal solutions for communication, data storage, and pervasive computing applications.&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background: #eee; color:black; font-size: smaller;&quot;&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background: #eee; color:black; font-size: smaller;&quot;&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background: #eee; color:black; font-size: smaller;&quot;&gt;&lt;div&gt;The 405GP and 405GPr processors support speeds of up to 266MHz and 400MHz respectively. Both incorporate a rich mix of features, such as a PCI interface, an SDRAM Controller, a 64-bit on-chip [[CoreConnect]] bus, Ethernet and other on-chip peripheral support, and the IBM [[CodePack]]™ code compression engine. In addition, power management features, a small form factor, and low power consumption make the AMCC 405 processor family an ideal platform for applications ranging from networking to video.&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background: #eee; color:black; font-size: smaller;&quot;&gt;&lt;div&gt;The 405GP and 405GPr processors support speeds of up to 266MHz and 400MHz respectively. Both incorporate a rich mix of features, such as a PCI interface, an SDRAM Controller, a 64-bit on-chip [[CoreConnect]] bus, Ethernet and other on-chip peripheral support, and the IBM [[CodePack]]™ code compression engine. In addition, power management features, a small form factor, and low power consumption make the AMCC 405 processor family an ideal platform for applications ranging from networking to video.&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;

&lt;!-- diff cache key elinux:diff:version:1.11a:oldid:72523:newid:209360 --&gt;
&lt;/table&gt;</summary>
		<author><name>Jwdietrich</name></author>	</entry>

	<entry>
		<id>http://elinux.org/index.php?title=PPC405_GP&amp;diff=72523&amp;oldid=prev</id>
		<title>Cschalle: Add category</title>
		<link rel="alternate" type="text/html" href="http://elinux.org/index.php?title=PPC405_GP&amp;diff=72523&amp;oldid=prev"/>
				<updated>2011-10-27T22:29:58Z</updated>
		
		<summary type="html">&lt;p&gt;Add category&lt;/p&gt;
&lt;table class='diff diff-contentalign-left'&gt;
				&lt;col class='diff-marker' /&gt;
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			&lt;td colspan='2' style=&quot;background-color: white; color:black;&quot;&gt;← Older revision&lt;/td&gt;
			&lt;td colspan='2' style=&quot;background-color: white; color:black;&quot;&gt;Revision as of 22:29, 27 October 2011&lt;/td&gt;
			&lt;/tr&gt;&lt;tr&gt;&lt;td colspan=&quot;2&quot; class=&quot;diff-lineno&quot;&gt;Line 54:&lt;/td&gt;
&lt;td colspan=&quot;2&quot; class=&quot;diff-lineno&quot;&gt;Line 54:&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background: #eee; color:black; font-size: smaller;&quot;&gt;&lt;div&gt;*** Up to 24 general purpose I/Os&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background: #eee; color:black; font-size: smaller;&quot;&gt;&lt;div&gt;*** Up to 24 general purpose I/Os&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background: #eee; color:black; font-size: smaller;&quot;&gt;&lt;div&gt;*** Interrupt controller including up to 13 external interrupts&lt;/div&gt;&lt;/td&gt;&lt;td class='diff-marker'&gt;&amp;#160;&lt;/td&gt;&lt;td style=&quot;background: #eee; color:black; font-size: smaller;&quot;&gt;&lt;div&gt;*** Interrupt controller including up to 13 external interrupts&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td colspan=&quot;2&quot;&gt;&amp;#160;&lt;/td&gt;&lt;td class='diff-marker'&gt;+&lt;/td&gt;&lt;td style=&quot;background: #cfc; color:black; font-size: smaller;&quot;&gt;&lt;div&gt;&lt;ins style=&quot;color: red; font-weight: bold; text-decoration: none;&quot;&gt;&lt;/ins&gt;&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td colspan=&quot;2&quot;&gt;&amp;#160;&lt;/td&gt;&lt;td class='diff-marker'&gt;+&lt;/td&gt;&lt;td style=&quot;background: #cfc; color:black; font-size: smaller;&quot;&gt;&lt;div&gt;&lt;ins style=&quot;color: red; font-weight: bold; text-decoration: none;&quot;&gt;[[Category:PowerPC]]&lt;/ins&gt;&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;

&lt;!-- diff cache key elinux:diff:version:1.11a:oldid:3064:newid:72523 --&gt;
&lt;/table&gt;</summary>
		<author><name>Cschalle</name></author>	</entry>

	<entry>
		<id>http://elinux.org/index.php?title=PPC405_GP&amp;diff=3064&amp;oldid=prev</id>
		<title>Wmat: Added missing PPC405GP pages</title>
		<link rel="alternate" type="text/html" href="http://elinux.org/index.php?title=PPC405_GP&amp;diff=3064&amp;oldid=prev"/>
				<updated>2007-05-25T17:10:02Z</updated>
		
		<summary type="html">&lt;p&gt;Added missing PPC405GP pages&lt;/p&gt;
&lt;p&gt;&lt;b&gt;New page&lt;/b&gt;&lt;/p&gt;&lt;div&gt;PowerPC 405GP - CPU Performance 133-266MHz - Features GPIO, PCI, SRAM Memory Controller&lt;br /&gt;
&lt;br /&gt;
* Datasheet: {{pdf|ppc405gp.pdf | ppc405gp}}&lt;br /&gt;
* [https://www.amcc.com/MyAMCC/retrieveDocument/PowerPC/405GP_GPR/PPC405GP_UM2005_v1_02.pdf User's manual|User's Manual]&lt;br /&gt;
* Errata: {{pdf|ppc405gp-errata.pdf|ppc405gp-errata}}&lt;br /&gt;
&lt;br /&gt;
A fast, flexible solution for embedded developers.&lt;br /&gt;
&lt;br /&gt;
General Description&lt;br /&gt;
&lt;br /&gt;
405GP/GPR Product Photo The AMCC PowerPC 405GP and 405GPr family of 32-bit RISC processors is designed to provide a flexible, fast time-to- market hardware solution to satisfy the demands of high-performance embedded applications. Implemented in the scalable PowerPC architecture, the 405GP and 405GPr processors maintain code compatibility with other PowerPC processors for ease in migration and faster time-to-market. An optimized balance of performance, low power, and features makes them ideal solutions for communication, data storage, and pervasive computing applications.&lt;br /&gt;
&lt;br /&gt;
The 405GP and 405GPr processors support speeds of up to 266MHz and 400MHz respectively. Both incorporate a rich mix of features, such as a PCI interface, an SDRAM Controller, a 64-bit on-chip [[CoreConnect]] bus, Ethernet and other on-chip peripheral support, and the IBM [[CodePack]]™ code compression engine. In addition, power management features, a small form factor, and low power consumption make the AMCC 405 processor family an ideal platform for applications ranging from networking to video.&lt;br /&gt;
&lt;br /&gt;
Looking for PowerPC downloads click here.&lt;br /&gt;
&lt;br /&gt;
Highlights&lt;br /&gt;
&lt;br /&gt;
** High-performance, low-power processors for the most demanding embedded applications PowerPC 405GP/405GPr Embedded Processors deliver up to 400MHz performance and a rich mix of features for Internet, communication, data storage, consumer, and imaging applications&lt;br /&gt;
** Includes on-chip SRAM with single-cycle access for faster processing in data-intensive applications, such as routers and switches&lt;br /&gt;
** Supports full application-code compatibility with all other PowerPC® processors for seamless migration&lt;br /&gt;
** Uses the award-winning 64-bit IBM [[CoreConnect]]™ high-performance on-chip bus&lt;br /&gt;
** Offers a wide array of small-footprint- package options for high-density applications, such as telecommunications devices&lt;br /&gt;
** Employs the IBM [[CodePack]]™ code compression core to reduce system memory requirements and cost&lt;br /&gt;
&lt;br /&gt;
Features&lt;br /&gt;
&lt;br /&gt;
** On-chip SDRAM Controller&lt;br /&gt;
*** Contains separate 32-byte read and 128-byte write buffers&lt;br /&gt;
*** Programmable address mapping&lt;br /&gt;
** External Peripheral Controller&lt;br /&gt;
*** Supports ROM, EPROM, SRAM&lt;br /&gt;
*** Flash and slave peripheral I/O devices&lt;br /&gt;
*** 8-, 16-, 32-bit external data bus width&lt;br /&gt;
*** Programmable address mapping&lt;br /&gt;
** External Bus Master Controller - Allows external masters to access SDRAM and PCI&lt;br /&gt;
** DMA Controller&lt;br /&gt;
*** 4 independent channels&lt;br /&gt;
*** Supports transfers between SDRAM, PCI, internal UARTs, and devices on the external peripheral bus&lt;br /&gt;
** PCI Interface&lt;br /&gt;
*** 32-bit PCI V2.2 compatible&lt;br /&gt;
*** Synchronous and asynchronous operation&lt;br /&gt;
*** Internal PCI arbiter supports six PCI masters&lt;br /&gt;
*** Supports external arbitration&lt;br /&gt;
** On-chip Ethernet Support&lt;br /&gt;
*** 10/100 MAC&lt;br /&gt;
*** Dedicated DMA controller&lt;br /&gt;
** [[CodePack]] Decompression&lt;br /&gt;
*** Stores instructions in memory in compressed format&lt;br /&gt;
*** Improves code density by up to 40%&lt;br /&gt;
** Other On-chip Peripherals&lt;br /&gt;
*** 2 serial ports&lt;br /&gt;
*** Master and slave IIC controller&lt;br /&gt;
*** Up to 24 general purpose I/Os&lt;br /&gt;
*** Interrupt controller including up to 13 external interrupts&lt;/div&gt;</summary>
		<author><name>Wmat</name></author>	</entry>

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