RTWG-discussion-points

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Revision as of 03:55, 4 September 2007 by Tim Bird (Talk | contribs) (Interbench)

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Review of test programs

lpptest

problems:

  • requires 2 machines
  • requires parallel port (not many embedded boards have this)
  • uses TSC, which is i386-specific

benefits:

  • built into the rt-preempt patch
  • 2-machine system gives unbiased timing results
    • instrumentation does not interfere with the timings

realfeel

benefits:

  • is one-machine
  • uses /dev/rtc, does not use timer interrupt
    • this isolates the ISR handling from timer operations
  • is a very simple test

problems:

  • uses TSC, which is i386-specific
  • doesn't have an instrumentation point in the kernel
    • no measurement of int latency, only process start latency
  • process start latency is "guessed" from expected interrupt time
    • that is, it is not actually measured
  • not all boards have a working /dev/rtc driver


igel test

This tests scheduling latency on receipt of a character on an SM501 uart. The UART driver gets a timestamp on ISR start, and can be asked for them from user-space after a run. The user-space driver measures the time from ISR start to task start. Test is specific to SH architecture. Uses SH hardware timer.

SH4 running at 240 MHZ, 64 MB memory.

See http://tree.celinuxforum.org/CelfPubWiki/UserLevelDeviceDriver (page is in Japanese)

See also: CELF Jamboree 14 presentation

  • Yung Joon will ask Takao Ikoma to translate this page.
  • Matsubara-san will update the driver and some of the text on the page.
    • will attach latest driver source
  • Tim will provide Ikoma-san e-mail

Test shows some important results:

  • 2.6.16.4 has much better scheduling latency under load than 2.4.20
    • test was with kernel preemption - withOUT RT-preempt patches loaded.
  • signal delivery method of waking up tasks took a lot longer than unblocking an I/O operation
    • signal delivery is a bad method to use for measuring RT performance

Interbench

Need to investigate, but looks like a test of scheduling latency.

See http://members.optusnet.com.au/ckolivas/interbench/