SpiSlaveZero
Contents
SPI Slave Zero
SPI Slave Zero is a specification for SPI peripheral intended for verification of SPI master drivers. The concept is borrowed from that of USB Gadget Zero which serves as a test endpoint for USB HCI drivers. The intention of the specification is to be broad enough to be implemented on a wide range of microcontrollers and SoCs with capable hardware SPI slave peripherals or optionally via bitbanging.
SSZ Specification Rev 0.1
SPI Slave Zero (SSZ) is a SPI peripheral supporting streaming read of a data test pattern, write sinking, and optionally write storage and read back for data integrity testing. The peripheral supports a combination of out-of-band signals to control reset and fundamental protocol configuration as well as a register set for driver discovery of supported features for a given implementation.
I/O Resources
SSZ requires the following minimal signal resources:
- MOSI
- MISO
- SCLK
- SS
- RESETn
- MODE[1..0]
Initialization
- RESETn is asserted by the master for 10ms.
- TBD
Command Protocol
TBD
Register 0x00
TBD