Parallella Hardware

Introduction


The key features of the Parallella board are: a Xilinz Zynq SoC which provides a Dual ARM® Cortex™-A9 processor plus programmable logic, 16 or 64-core Epiphany floating-point accelerator (32/100 GFLOPS), high bandwidth expansion via daughter cards, and interfaces that include Gigabit Ethernet, HDMI and MicroSD.

Kickstarter
The initial run of Parallella computers is being funded via a Kickstarter campaign, which on 27th October 2012 had succeeded in raising $898,921 via 4,965 backers, and with those pledging $99 or more receiving at least one board.

Thanks to generous support from Xilinx the Kickstarter boards will be upgraded to use a Zynq-7020 SoC instead of a Zynq-7010.

General availability
Work is being done to put distribution in place, however, a date for post-Kickstarter orders has not been confirmed yet and in the meantime interest can be registered using a form on the project website.

Prototypes
The first Parallella prototypes shipped in late December 2012 and comprise of a ZedBoard plus a 16 or 64-core Epiphany FMC.

From a software perspective the prototypes are virtually identical to the final form factor boards.

Beta boards
The first 10 Parallella beta boards came back from assembly on 11th April 2013 and were unveiled four days later at the Linux Foundation Collaboration Summit.

Specifications
Please note that these are preliminary specifications and subject to change.

Documentation
Comprehensive documentation is being made available without the need for any special access or NDAs.


 * Preliminary Parallella Reference Manual (PDF)
 * Parallella Platform Reference Design (ARM-Epiphany interface)
 * Epiphany-III 16-core 65nm Microprocessor (E16G301) datasheet
 * Epiphany-IV 64-core 28nm Microprocessor (E64G401) datasheet

Note that the Platform Reference Design includes HDL sources that are provided under the GPL.

The Parallella board design will be published under a Creative Commons license once the release 1.0 hardware ships.