Jetson TX1/FAQ

Here we share some useful FAQs for Jetson TX1.

If you can't find the information you need, please visit the DevTalk Developer Forums and search or start a topic.

= Design with module =

How to implement USB3 OTG in carrier board design
tags: USB, OTG, USB3

Use USB 3.0 Micro AB connector in carrier board, the pin connection suggestion



Make sue the "USB3.0 OTG Micro-A plug to Standard-A host receptacle" cable follow the USB3.0 ECN 017, for example, product from COXOC http://www.coxoc.com.tw/?theme_select=english

Host mode. Please attach a USB 3.0 device to the port, and check whether XHCI enumerates the device.

If there's no XHCI message, please check kernel config and log to make sure XHCI is loaded.

If XHCI enumerates the device as a high-speed device (not SuperSpeed), that may be either portmap/lane/… misconfigured in device tree, or the USB cable fails (Some so-called USB 3.0 cables only connect 2.0 pins.) Please check the kernel log.

Device mode. Confirm XUDC/XOTG enabled. -

Enable g_android from defconfig(CONFIG_USB_G_ANDROID)

Install mass_storage function from sys node

echo 0 > /sys/class/android_usb/android0/enable

echo 0955 > /sys/class/android_usb/android0/idVendor

echo 7E00 > /sys/class/android_usb/android0/idProduct

echo mass_storage > /sys/class/android_usb/android0/functions

echo 0 > /sys/class/android_usb/android0/bDeviceClass

dd if=/dev/zero of=/home/ubuntu/msc.ext4.img bs=1M count=1k

mkfs.ext4 /home/ubuntu/msc.ext4.img

echo /home/ubuntu/msc.ext4.img > /sys/class/android_usb/android0/f_mass_storage/lun/file

echo 1 > /sys/class/android_usb/android0/enable

Then connect the device to USB 3.x host and check whether it can be enumerated in SS mode.

The minimum low pulse duration of RESET for module
tags: reset

RESET_IN# is from RESET key on carrier board as manually reset input, the low duration should be dozens of ms. For completed reset, keep pulse > 300ms.

Does TX1 support SATA hotplug?
tags: SATA

SATA hotplug is not supported officially unless done from SATA port multiplier.

We have been verifying SATA functionality using Crucial MX 500, 200 and Kingston SSDNOW 100 and all are working fine.Same are used for perf KPI as well, with every milestone, so any detection failure can be ruled out too as well.

What’s the backup battery characters and how to set charging/voltage of VDD_RTC?
tags: RTC

TX1 module A50 pin VDD_RTC pin connect direct to MAX77620 pad BBATT.

How to get PMIC datasheet: TX1 module use PMIC MAX77620, user can get MAX77620 datasheet through Maxim technical support after NDA, link as below:

https://support.maximintegrated.com/cn/tech_support/submit_question.mvp?pl_id=0

Send request through Maxim technical support, illustrate you are using Jetson TX1, need MAX77620 datasheet.Maxim should send NDA to you if you don’t have it yet, sign it and send back to Maxim, then Maxim can share MAX77620 datasheet with you.

Supported setting: VBBATT programmable output voltage range: typ 2.5/3/3.3/3.5(V).

BBATT have programmable Constant Current Limit:50/100/200/400/600/800(uA).

Where to program: (Following information based on R24.1)

max77620 charging voltage and current are define in DTS: arch/arm64/boot/dts/tegra210-platforms/tegra210-jetson-e-pmic-p2530-0930-e03.dtsi

Now the settings are:

maxim,backup-battery-charging-current = ;

maxim,backup-battery-charging-voltage = ;

USB2_EN_OC is NC on JTX1, if user needs one more of this kind of pin, which one to use?
tags: USB

USB*_EN_OC have 2 functions, as enable pin and over current detection (it’s open drain pin, any device over current can drive this pin low and SOC can detect it). If don’t need OC function, yes it’s OK to just use a GPIO as enable. If don’t mind, 2 USB3.0 port can share the same enable control/over current detection USB1_EN_OC#. Sharing of VBUS_EN signal is common in PC architecture. Current rating and overcurrent trip point for the shared load switch will have to increase accordingly. Recommend using a unused pin with the same pad type (BDPGLPHVIN_D2FC_VDVXP1P1P1) and GPIO capability to support additional USBx_EN_OC. The pin need to be configured as open-drain bi-directional if required.

Besides the USB_VBUS_EN0, USB_VBUS_EN1 and I2C pins, there are others that use the same pad type including:

-      PEX_L[1:0]_CLKREQ_N. If both controllers are not used, this could free up one pin.

-      PEX_L[1:0]_RST_N. Depending on PCIe usage, one or both could be available.

-      PEX_WAKE. If PCIe is not used at all, or this wake capability is not required, this pin would be available.

-      GPIO_PCC7. Used for HDMI load switch enable. Could be free if HDMI not implemented.

-      HDMI_INT_DP_HPD & HDMI_CEC. Again, these would be available if HDMI not implemented.

Advantage of using VI_I2C?
tags: I2C, VI_I2C

VI_I2C is connected directly to the Host1X bus while I2C3 is connected to the FAPB (peripheral bus) which needs to go thru a couple of bus bridges. Theoretically, VI_I2C has less delay/lower latency than I2C3. For use cases where imager control delay/latency is important then VI_I2C is preferred over I2C3. (Topic 971566)

Tegra PCIe and DMA Capabilities and Restrictions?
tags: PCIe, DMA

Till and including T210: -> Tegra doesn’t have any path from AHB/APB-DMA engines to PCIe IP as PCIe is connected directly to MSELECT and AHB/APB DMA engines only deal with IPs connected to respective AHB and APB buses. So, using either AHB/APB engines for PCIe is not possible In case of T186: -> Even though GPC-DMA engine has path to access PCIe, there is no FC (Flow Control) implemented for this path. So, this is not useful for any perf improvement. Any reads/writes generated by GPC-DMA completes one at a time on MMIO and can be used for register modifications where perf is not critical.

The Torque value of TX1 module screws
tags: torque, screws

Per thermal design guide as below, for all mounting screws, a maximum troque of 0.1 N-m is recommended. User can torque it down to anything less than 0.1Nm, above this value may cause problems with the thread insert. Anything less than 0.1Nm may lead to screws coming loose.

The Standoffs between Jetson TX1 and Carrier Board
tags: Standoff, mechanical

The 4 standoffs between Jetson TX1 and carrier board: M3x0.5, 7mm (0.275+-0.005 inch).

What’s the operating temperature range of dev kit?
tags: operating temperature, dev kit

There is the range (-25°C~80°C) of module in module datasheet, but no such info of dev kit, even it should be the same as module, already informed Brian to check if it should be included in OEM DG, Checked internal the range of dev kit should be 0c ~ 50c, 50c is due to camera, 0c is due to dedicate component.

Max Video Encode Capability
tags: media, encode

Due to HW limitation.

Max (width x height)   Min (width x height)

HEVC          4096x2304                     144x144

VP9             4096x2304                      144x144

H264           4096x4096                      Width >=48p

MPEG2       4096x4096                      Width >= 48p

VP8             4096x4096                      Width >= 48p

VC1             2048x1024                      Width >= 48p

MPEG4       2048x1024                       Width >= 48p.

Does TX1 support SMBus?
tags: SMBus, I2C

SMBus is very similar to I2C, but no direct confirm of supporting it in current doc. The main differences: SMBus is only up to 100khz, VIH > 2.1V, timeout-reset & alert function. Need to add a level shift in charger design guide on the connections between TX1 and charger IC (BQ24735, SMBus only).

Does TX1 support GPS PPS input?
tags: PPS

There is a GNSS_PPS pin (B18) on TX1/TX2 board connector, but it is unconnected in module, and the HW timestamping is only for TX2 and after, not yet for TX1. There are some GPIOs used in AO partition have timestamping function. For TX1, SW timestamping is the only choice. Improved SW based timestamping has been done by running code on the ARM7 device.

How to eliminate the battery over current limit hit warning?
tags: warning, EDP

Users often met the warning message: WARNING - Battery Over Current Limit hit, please refer to the Jetson Power management application note.

It is caused by critical current limit setting of VDD_IN of power monitor. Present setting is constant based on VDD_IN= 19V and EDP is 40w. But in fact when input voltage is lower and current will increase and reach the threshold 2102 mA.

The solution is to change the limits value based on real input voltage, for example, the VDD_IN = 8V, the critical current limit should be 5000mA.

What if use eDP as DP?
tags: eDP, DP

If want to implement HDMI + DP, so can only use eDP as DP. And that will has no audio and HDCP.

How to do manually USB compliance test?
tags: USB, compliance test

There is no USB tuning guide in download center, the tegra_hc_test_v3_static tool can only generate TEST_PACKET, if users want to generate TEST_SE0_NAK, TEST_J and TEST_K, he will need to know the register address of T_XUSB_XHCI_OP_PORTPMSCHS_x, but in TRM only has a range for all ports address. These addresses are in Tuning Guide and also can be calculated with formula: Address: Operational Base + (404h + (10h * (n-1))) where: n = Port Number (Valid values are 1, 2, 3, … MaxPorts). Base address of Tegra XHCI mmio region is 0x70090000. Tegra XHCI operational base is 0x70090020 because capability registers occupies 0x20 bytes. Address of PORTPMSC for n-th port is "0x70090020 + (404h + (10h * (n-1)))".

And the mapping between physical ports and PORTPMSC is as below:

SS P0: XUSB_XHCI_OP_PORTPMSCHS_0

SS P1: XUSB_XHCI_OP_PORTPMSCHS_1

SS P2: XUSB_XHCI_OP_PORTPMSCHS_2

SS P3: XUSB_XHCI_OP_PORTPMSCHS_3

USB2_P0:  XUSB_XHCI_OP_PORTPMSCHS_4

USB2_P1:  XUSB_XHCI_OP_PORTPMSCHS_5

USB2_P2:  XUSB_XHCI_OP_PORTPMSCHS_6

USB2_P3:  XUSB_XHCI_OP_PORTPMSCHS_7

What's the material of TTP (Thermal Transfer Plate)
tags: TTP, Aluminum

It is Aluminum 6063-T5, thermal conductivity is 209W/m-K.

Does TX1 support GMSL camera?
tags: GMSL

GMSL camera is available on PX2 (2 TX1 inside), but PX2 has a different SW stack to TX1, so at this point we do not have a firm plan for a reference design, but will update if we make any progress in that direction, and arch wide, this should be just drivers for the GMSL bridge chip to make it transparent for CSI.

How to shorten power-off trigger time (power button)?
tags: EN0DLY, Power Button

Current default EN0DLY time is set to 8s, which means the system will power off when pressing power button for 8s and more. The range of EN0DLY is 2s~12s, it can be shorten by set register MRT[2:0].

ESD spec of dev kit
tags: ESD

Regarding the ESD spec of dev kit. Checked the internal info, the spec is:

ESD spec (EN 61000-4-2):

Contact Discharge: +/- 4kV

Air Discharge: +/- 8kV

= Jeston TX1 FAQ =

How to configure I2C pins on Jetson-TX1 to support 3.3V?
tags: I2C

OD mode should be enabled in 3.3V and disabled in 1.8V. In TX1 there is no E_OD pins, so the OD mode is enabled by set E_IO_HV to 1, which is “3.3V Tolerance Enable” in Pinmux sheet.

Add below code in DTS. (Topic 961921).

nvidia,io-high-voltage = ;

What’s the max current for Samtec connectors on Jetson-TX1?
tags: power consumption, current, connector

2A per pin generally, 32mohm resistance each pin.

The model name of power monitor in schematic and BOM file are different
tags: power monitor, BOM

The U532 in Jetson-TX1 module and U10, U18 in carrier board use INA3221AIRGVR in schematic and HPA01113AIRGVR in BOM file, they are the same. INA3221AIRGVR is also known as HPA01113AIRGVR, as NI was merged into TI.

Are the power monitors required for carrier board?
tags: power monitor

They are used for power consumption monitoring, can be deleted if no such requirement.

How to use INAs on Jetson-TX1?
tags: power monitor, power consumption

Verify Jetson TX1 module is revision 300 or higher. The feature to enable use of INA monitors for Jetson TX1 was added starting with revision 300. For example, SKU 699-82180-1000-300 has the feature.

The module SKU can be determined with this command:

$ i2cdump -y -r 0x14-0x26 2 0x50 b

Read the information via sysfs nodes INA3221 monitors are readable via sysfs nodes. Where N is a channel number (0 – 2):

rail_name_N exports rail name in_currentN_input exports rail current in mA in_voltageN_input exports rail Voltage in mV in_powerN_input exports rail power in mW crit_current_limit_N exports critical current limit in mA for overcurrent throttling Jetson TX1 module The Jetson TX1 module has a 3-channel INA3221 monitor at I2C address 0x40. The sysfs nodes to read rail name, voltage, current & power can be found at:

/sys/devices/platform/7000c400.i2c/i2c-1/1-0040/iio:device0/

These are the rail names:

Channel-0: VDD_IN Channel-1: VDD_GPU Channel-2: VDD_CPU Jetson TX1 Development Kit carrier board The Jetson TX1 Development Kit carrier board has 3-channel INA3221 monitors at I2C addresses 0x42 and 0x43. The sysfs nodes to read rail name, voltage, current & power can be found at:

/sys/devices/platform/7000c400.i2c/i2c-1/1-0042/iio:device1

/sys/devices/platform/7000c400.i2c/i2c-1/1-0043/iio:device2

These are the rail names for I2C address 0x42:

Channel-0: VDD_MUX Channel-1: VDD_5V_IO_SYS Channel-2: VDD_3V3_SYS These are the rail names for I2C address 0x43:

Channel-0: VDD_3V3_IO Channel-1: VDD_1V8_IO Channel-2: VDD_M2_IN Examples:

To read INA3221 @ 0x40 channel-0 rail name (i.e., VDD_IN):

$ cat /sys/devices/platform/7000c400.i2c/i2c-1/1-0040/iio:device0/rail_name_0

To read VDD_IN critical current limit:

$ cat /sys/devices/platform/7000c400.i2c/i2c-1/1-0040/iio:device0/crit_current_limit_0

To read VDD_IN voltage, current & power:

$ cat /sys/devices/platform/7000c400.i2c/i2c-1/1-0040/iio:device0/in_current0_input

$ cat /sys/devices/platform/7000c400.i2c/i2c-1/1-0040/iio:device0/in_voltage0_input

$ cat /sys/devices/platform/7000c400.i2c/i2c-1/1-0040/iio:device0/in_power0_input

How to check the temperature of the module?
tags: temperature, thermal

To list the thermal notes

$ cat /sys/class/thermal/thermal_zone*/type

To show the temperature of thermal notes

$ cat /sys/class/thermal/thermal_zone*/temp

About the thermal nodes:

A0-therm: from the Always-ON Tsensor inside Tegra X1, it is the only Tsensor which can work during deep sleep.

CPU-therm: from the Tsensor inside Tegra X1, close to CPU part.

GPU-therm: from the Tsensor inside Tegra X1, close to GPU part.

PLL-therm: from the Tsensor inside Tegra X2, close to PLL part.

PMIC-therm: from the Tsensor in external PMIC. It is not the real-time temperature, but only show the status of PMIC thermal alarm bit. PMIC driver will set it to 100000 if no PMIC thermal alarm, 125000 when 120C PMIC thermal alarm set, 145000 when 140C PMIC thermal alarm set.

Tboard_tegra: from the Tsensor inside external thermal monitor IC. We take it as the temperature of PCB.

Tdiode_tegra: the external thermal monitor IC read the temperature by the Tdiode inside TegraX1. The Tdiode is closed to the CPU and GPU part. It is more accurate than the Tsensor.

thermal-fan-est: Calculate from the CPU-therm and GPU-therm, we use this node to control the PWM FAN.

YCbCr422P display format support
tags: display

The Jetson TX1 does support YCbCr422P (planar) input surfaces. However, do note that the Jetson TX1 does not support YCbCr422 output. All input pixel formats are converted to RGB before being sent out over the TX1's display interfaces.

How to config USB to device mode?
Tags: USB

There are a total of 4 USB2 ports and 4 USB3 ports, and 1 HSIC port. Of the eight ports, one can

be USB3.0 OTG or USB2.0 OTG while the rest are host mode only ports.

To config JTX1 USB 3.0 port as device mode:

Modify the kernel following attached patch. Enable Android Gadget: echo 0 > /sys/class/android_usb/android0/enable

echo 0955 > /sys/class/android_usb/android0/idVendor

echo 7E00 > /sys/class/android_usb/android0/idProduct

echo mass_storage > /sys/class/android_usb/android0/functions

echo 0 > /sys/class/android_usb/android0/bDeviceClass

dd if=/dev/zero of=/home/ubuntu/msc.ext4.img bs=1M count=1k

mkfs.ext4 /home/ubuntu/msc.ext4.img

echo /home/ubuntu/msc.ext4.img > /sys/class/android_usb/android0/f_mass_storage/lun/file

echo 1 > /sys/class/android_usb/android0/enable

Plug in USB3.0 cable(Swap the TX/RX signal for normal USB3.0 A to A extension cable) Plug in USB2.0 cable(The system need VBUS detect to identify a USB3.0 host connected) The host will detect a storage device which emulated from JTX1.

Refer to topic 952472

eMMC and DRAM will be held the parts till EOL of TX1 module? Or the eMMC and DRAM will be changed by these parts EOL?
tags: EOL

We don’t commit no changes on eMMC and DRAM. Now TX1 is module, so users no need to concern about component inside the TX1 module.

The UART debug port in TX1 carrier board
tags: UART, debug

On P2597 carrier board, when no debug board connected to J10, UART0 debug port will be connected to J21 by UART MUX U8 automatically, the level is 3.3V.

Why 2.4GHz/5GHz WiFi on TX1 does not support all channels?
Tags: WiFi, 2.4GHz, 5GHz, channel, upper band

User will find TX1 WiFi only supports part of channels on 24.GHz/5GHz as below figure showing, the reason for restricting these channels is to enable one SKU for all countries. The link of the country and corresponding channels list is here: https://en.wikipedia.org/wiki/List_of_WLAN_channels.

Is there SATA tuning guide for TX1?
Tags: SATA

No tuning is required. As long as the user meets the requirements in the DG, SATA should work.

Audio playback noise on I2S via Realtek ALC5639 codec on TX1?
Tags: Audio

On TX1 default design, there is no audio codec. User might meet audio noise issue if they added ALC5639. Can be fix by below:

https://devtalk.nvidia.com/default/topic/984409/jetson-tx1/audio-playback-noise-on-i2s-via-realtek-acl5639-codec/post/5053021/#5053021

MAC Address on TX1
Tags: MAC address, Ethernet

Jetson TX1 is shipped with MAC address, to config vendor-specified MAC address or for more details, go to Jetson_TX1_Module_EEPROM_Layout.pdf.

BTW, U-boot don't support the on-module Ethernet, so there is no MAC address in U-boot environment, cannot change the MAC address during U-boot in factory.

What's the PAD drive strength?
Tags: PAD, Driver Strength

The data of drive strength is contained in TegraX1_Embedded_IF_DG.pdf as below:



What's the maximum lane flight time of MIPI interface on Jetson?
Tags: MIPI, flight time

The flight time limit of carrier board is 1100ps which is decided by total limit of MIPI flight time (2 ns per MIPI specification) and the lane length of MIPI in module, it should not be overrided.

How to set UCM2 mode on TX1?
Tags: UCM2

In tk1, the configuration method ischip_personality=1 on the kernel command line to set UCM2 #0 for UCM1.

For TX1, 'p2371-2180-devkit-24x7' will flash UCM2 personality and 'p2371-2180-devkit' will flash UCM1 personality.

Do NOT use TX1/TX2 adapter to TK1 board
Tags: adapter

Jetson TK1 is characterized to accept an input voltage of 12V +10%. The board may not reliably turn on with < 9.5V. A voltage > 13.2V may damage a SATA HDD using 12V. > 16V, the main board may be damaged.

Does Jetson not monitor the FAN_TACH?
Tags: FAN_TACH

Checked TRM, only TX2 has tachometer function enabled and has a dedicated chapter for fan tachometer, currently it is not supported on TX1.

Is the PCB of TX1 certified UL94 V0?
Tags: PCB, UL94 V0

We don’t have flammability cert but our PCB is UL94 V0 certified. Our board UL safety requirement is above V1.Topic 1030499

CPU Throttling Threshold
Tags: throttling threshold

cpu_throttle in BSP r24 = 89C, from DT settings. cpu_throttle in BSP r28 = 97C, r24 setting is for smooth performance reduction in mobile use cases, r28 setting is for constant performance in embedded use cases.

BTW, JTX2 CPU throttling threshold in BSP r28 = 95.5C