R-Car/Boards/Stout:CPLD

This page contains information about hardware Stout board multiplexing. It allows to use same pins for on board connectors and different peripherals from a custom extension board and switching between them in the real time. There are several multiplexers under CPLD control, which connect SoC with on board peripherals and a 440-pin connector. It allows reuse SoC's busy pins.

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VIN0
Vin0 interface can be connected using CPLD in two different modes: BT656 and Full.
 * Hardware that is incompatible with VIN0 BT656 mode: SDHI2
 * Hardware that is incompatible with VIN0 Full mode: SDHI2, VIN2 (all modes) and AVB
 * VIN0.png

BT656 mode
In BT656 mode only VIN0_DATA<7..0> and VIN0_CLK pins are used. This functionality is enough for using cameras with itu-bt656 8bit interface. Pins VIN_DATA<7..0> are connected to pins 3-14 of the CN6 and pins C15-C20, C22-C23, D15-D18, D23 of the 440-pin connector. This pins are common for the VIN0 and SDHI2 subsystems, so using VIN0 and SDHI2 simultaneously is impossible.

Full mode
In Full mode all functionality of VIN0 subsystem is used. Cameras with ITU-R BT.601, ITU-R BT.656 interfaces can be connected to the CN6 or to the 440-pin connector.

VIN1
Stout board supports three modes of connection VIN1 subsystem to the 440-pin connector: BT656, 10 bits mode and 12 bits modes. VIN1_HSYNC, VIN1_VSYNC, VIN1_FIELD, VIN1_CLK and VIN1_CLKENB are connected directly to R-Car H2 SoC. SD0 pins of the 440-pin connector and MicroSD card slot are disconnected from SoC in all VIN1 modes.
 * Hardware that is incompatible with VIN1 BT656 mode: SDHI0
 * Hardware that is incompatible with VIN1 10 bits mode: SDHI0, I2C1, VIN3 (modes with FIELD line)
 * Hardware that is incompatible with VIN1 12 bits mode: SDHI0, I2C1, VIN3 (modes with FIELD line), SCIFA0
 * VIN1.png

BT656
In this mode VIN1 has ITU-R BT.656 functionality and can be used via the 440-pin connector (C27-C34 and D39 pins), but only with 8 bits data width.

10 bits mode
This mode allows using 10bit interfaces. In this mode using I2C1 and SD0 is impossible. Modes with FIELD line for VIN3 are blocked too.

12 bits mode
This mode allows using 12 bits data width. In this mode using I2C1, SD0, USB debug serial output (CN9) and debug serial via the 440-pin connector is impossible. Modes with FIELD line for VIN3 are blocked too.

VIN2
Stout board supports four modes of connection VIN2 subsystem: BT656, mode with SYNC lines, mode with FIELD line and mode with SYNC and FIELD lines. VIN2_CLK (440-pin connector D49 pin) is connected directly to R-Car H2 SoC. 440-pin connector provide only 8 pins for video data. Using VIN2 pins disallows using VIN0 in Full mode and Ethernet AVB.
 * Hardware that is incompatible with VIN2 BT656 mode: VIN0 in Full mode, Ethernet AVB
 * Hardware that is incompatible with VIN2 with SYNC lines: VIN0 in Full mode, Ethernet AVB, VIN3 (modes with FIELD line), I2C1, Serial debug port (all modes)
 * Hardware that is incompatible with VIN2 with FIELD line: VIN0 in Full mode, Ethernet AVB, QSPI (all modes)
 * Hardware that is incompatible with VIN2 with FIELD and SYNC lines: VIN0 in Full mode, Ethernet AVB, QSPI, I2C1, VIN3 (modes with FIELD line), Serial debug port (all modes)
 * VIN2.png

BT656
In this mode VIN2 has ITU-R BT.656 functionality and can be used via the 440-pin connector (C42-C49 and D49 pins), but only with 8 bits data width.

BT656 with SYNC lines
Setting this mode connects pins D47, D48 of the 440-pin connector to SoC's pins VIN2_HSYNC and VIN2_VSYNC. Switching to this mode blocks USB debug serial output (CN9), debug serial via the 440-pin connector and using I2C1. VIN3 modes with FIELD line are blocked too.

BT656 with FIELD line
Setting this mode connects pins D45, D46 of the 440-pin connector to SoC's pins VIN2_CLKENB, VIN2_FIELD. Switching to this mode blocks QSPI interface (on board and external).

BT656 with FIELD and SYNC lines
Setting this mode connects pins D45, D46, D47, D48 of the 440-pin connector to SoC's pins VIN2_CLKENB, VIN2_FIELD, VIN2_HSYNC and VIN2_VSYNC. Switching to this mode blocks USB debug serial output (CN9) debug serial via the 440-pin connector, QSPI interface (on board and external) and use of I2C1. VIN3's lines FIELD and SYNC are blocked too.

VIN3
Stout board supports three modes of connection VIN3 subsystem to the 440-pin connector: BT656, mode with FIELD line and mode with SYNC and FIELD lines. VIN3<7..0> bus is connected directly to R-Car H2 SoC. 440-pin connector provides only 8 pins for video data. Using VIN3 pins disallows use of IRQ3 pin.
 * Hardware that is incompatible with VIN3 BT656 mode: IRQ3
 * Hardware that is incompatible with VIN3 with FIELD line: IRQ3, VIN1 (modes 10 bit and 12 bit), VIN2 (modes with SYNC lines)
 * Hardware that is incompatible with VIN3 with FIELD and SYNC lines: IRQ3, VIN1 (modes 10 bit and 12 bit), VIN2 (modes with SYNC lines), I2C1
 * VIN3.png

BT656
In this mode VIN3 has ITU-R BT.656 functionality and can be used via the 440-pin connector (C52-C59 and D49 pins), but only with 8 bits data width. Pin VIN3_CLK is multiplexed with IRQ3 line.

BT656 with FIELD line
Setting this mode connects pins D55, D56 of the 440-pin connector to SoC's pins VIN3_CLKENB, VIN3_FIELD. Switching to this mode also blocks VIN1 (modes 10 bit and 12 bit) and VIN2 (modes with SYNC lines).

BT656 with FIELD and SYNC lines
Setting this mode connects pins D55, D56, D57, D58 of the 440-pin connector to SoC's pins VIN3_CLKENB, VIN2_FIELD, VIN3_HSYNC and VIN3_VSYNC. Switching to this mode also blocks VIN1 (modes 10 bit and 12 bit) and VIN2 (modes with SYNC lines) and I2C.

Ethernet AVB
Setting this mode disconnects VIN0 and VIN2 pins of 440-pin connector and connects this SoC's pins to Altera MAX V, which converts ETH_GMII into the ETH_RGMII.
 * Hardware that is incompatible with Ethernet AVB mode: VIN0 (Full mode), VIN2 (all modes)

QSPI
QSPI can be connected to the on board QSPI Flash or to the external one. It can be selected using QSPI_ONBOARD mode or QSPI_COM_EXPRESS mode. Using QSPI blocks VIN2 (modes with FIELD line).
 * Hardware that is incompatible with Ethernet QSPI modes: VIN2 (modes with FIELD)

I2C
I2C subsystem can be connected to 440-pin connector and to PMIC using mode I2C1.
 * Incompatible modes: VIN1 (10 bits, 12 bits), VIN2 (with SYNC lines), VIN3 (with FIELD and SYNC lines)

IRQ3
Setting this mode connects IRQ3 line of SoC to the HDMI transmitter.
 * Incompatible modes: VIN3 (all modes)

SCIFA0 (Serial debug port)
SCIFA channel 0 can be connected to the on board ftdi UART to USB converter and then to the CN9 (mode SCIFA0_USB) or to the 440-pin connector (mode SCIFA0_COM_EXPRESS) directly.
 * Incompatible modes: VIN1 (12bits mode), VIN2 (modes with SYNC lines)

SCIFA2
SCIFA channel 2 and PWM have common pins. This pins can be connected to 440-pin as UART or as PWM.
 * Incompatible modes: PWM210

SD0
Setting CPLD in this mode connects R-Car H2 SoC to the MicroSD socket. This pins are also available in the 440-pin connector.
 * Incompatible modes: VIN1 (all modes)

SD2
Setting CPLD in this mode connects SDHI2 subsystem to the 440-pin connector.
 * Incompatible modes: VIN0 (all modes)

PWM 2,1,0
Setting this mode connects PWM subsystem (channels 0-2) to the 440-pin connector.
 * Incompatible modes: SCIFA2

signal multiplexing table
This table describes the possible setups of CPLD.
 * multiplexing.png

Software driver
Protocol part describes CPLD as a register with address 0x1 for loading configuration code. There are sysfs interface in yocto for access and special commands in U-Boot. Correct values can be calculated using this formula value = (current_value & (~mode_mask)) | mode_value Table with mode masks and mode values

U-Boot
There is a special command in U-Boot for working with CPLD: cpld read for reading value from register cpld write val for writing value to the register

The write cpld command can be added to the bootcmd environment variable. => set bootcmd 'cpld write 1 4842; tftp 0x40007fc0 uImage; tftp 0x40f00000 r8a7790-stout.dtb; bootm 0x40007fc0 - 0x40f00000'

During start up U-Boot prints current configuration. U-Boot output should looks like this:
 * DRAM: 1 GiB
 * CPLD version:             0x20150427
 * H2 Mode setting (MD0..28): 0x09e32028
 * Multiplexer settings:     0x00004062
 * HDMI setting:             0x00000007
 * DIPSW (SW3):              0x00000000

Where 0x00004062 means that modes SCFIA0 via USB, I2C1 and VIN0 Full modes are set.

Yocto
Yocto provides access to the CPLD via sysfs. It is possible to use hex numbers to manage configurations, similar to U-Boot. There are two files for it: /sys/devices/cpld.8/adr and /sys/devices/cpld.8/val. adr should be set to 0x1.

echo -n "0x1" > /sys/devices/cpld.8/adr Read current mode cat /sys/devices/cpld.8/val Set new mode echo -n val > /sys/devices/cpld.8/val

There are also four pseudo multiplexers for named access: All possible modes for this multiplexers can be read from states files. Reading states for mux.9 cat /sys/devices/mux.9/states
 * /sys/devices/mux.9/
 * /sys/devices/mux.10/
 * /sys/devices/mux.11/
 * /sys/devices/mux.12/

Table with possible states

Reading and setting can be done via /sys/devices/mux.x/state file: cat /sys/devices/mux.9/state sdhi2_state echo -n sdhi2_state > /sys/devices/mux.9/state Unbind of current driver that uses pinmux is not necessary but desirable.
 * Reading
 * Setting