User:Uli/Tests:MSIOF-SD

This describes a procedure for connecting MSIOF interface 1 to SD card slot 2 on the R-Car H1 "Lager" board to test SD via SPI operation.

Basic principle
The test setup logically disconnects the SD2 interface on the SoC from the physical SD card interface by defining them as GPIO inputs in the device tree and physically connects the relevant MSIOF1 pins to the SD card slot using three jump wires. It keeps SD2_DAT3 as the chip select line.

Wiring
To achieve the desired connections, the following jump wires must be installed between the EXIO_A (CN22) and EXIO_B (CN21) connectors: EXIO_A pin        EXIO_B pin 19 (MSIOF1_SCK_3)  3 (SD2_CLK_3) 31 (MSIOF1_TXD_3)  5 (SD2_CMD_3) 33 (MSIOF1_RXD_3) 13 (SD2_DAT0_3) The EXIO connectors are of type QSE-040-01-F-D-A (80 pins), but only the lower 40 pins of each connector are used, so it is possible to use smaller QTE-020 plugs to connect.

Setup of static signals in the device tree
A number of GPIOs need to be set to specific states in r8a7790-lager.dts:
 * 1) The jumpered SD2 pins need to be disabled (set to input).
 * 2) The CS line of the PMIC attached to MSIOF1 must be deasserted to avoid interference.
 * 3) The SD2 power (GP5_25) and voltage control (GP5_30) must be asserted, enabling a 3.3V power supply to the SD card connector.

Here is a suitable DT configuration:

/* disable patched lines on SDHI side */ &gpio3 { sd2_clk { gpio-hog; gpios = ; /* SD2_CLK */ input; };       sd2_cmd { gpio-hog; gpios = ; /* SD2_CMD */ input; };       sd2_dat0 { gpio-hog; gpios = ; /* SD2_DAT0 */ input; }; }; /* force PMIC CS off */ &gpio4 { pmic_cs { gpio-hog; gpios = ; output-high; }; }; /* force SD2 power on, 3.3V */ &gpio5 { sd_pwr { gpio-hog; gpios = ; output-high; };       sd_vccq { gpio-hog; gpios = ; output-high; }; };

It is also necessary to disable the default &sdhi2 device node.

Verification using GPIO bit-banging
In order to verify that the hardware setup works, it is possible to define a GPIO bit-banging SPI interface inside the root node like so: spi_gpio: spi-gpio { pinctrl-0 = <&msiof1_pins>; pinctrl-names = "default"; compatible = "spi-gpio"; #address-cells = <1>; #size-cells = <0>; gpio-sck = <&gpio4 8 GPIO_ACTIVE_HIGH>; gpio-mosi = <&gpio4 12 GPIO_ACTIVE_HIGH>; gpio-miso = <&gpio4 13 GPIO_ACTIVE_HIGH>; num-chipselects = <1>; cs-gpios = <&gpio3 21 GPIO_ACTIVE_LOW>; status = "okay";

spi@0 { compatible = "mmc-spi-slot"; reg = <0>; voltage-ranges = ; spi-max-frequency = ; };       }; Once CONFIG_SPI_GPIO is enabled, SD cards supporting SPI interfacing inserted in SD card slot 2 should be accessible using this device tree.

Accessing SD cards using MSIOF1 and SPI
Instead of the above device entry, the &msiof1</tt> node in r8a7790-lager.dts</tt> must be amended to look like this: &msiof1 { pinctrl-0 = <&msiof1_pins>; pinctrl-names = "default";

status = "okay";

num-chipselects = <1>; cs-gpios = <&gpio3 21 GPIO_ACTIVE_LOW>; /* SD2_DAT3 */

spi@0 { compatible = "mmc-spi-slot"; reg = <0>; voltage-ranges = ; spi-max-frequency = ; };

pmic: pmic@0 { compatible = "renesas,r2a11302ft"; reg = <0>; spi-max-frequency = ; spi-cpol; spi-cpha; }; }; Note that the pmic</tt> node has been disabled.
 * 1) if 0
 * 1) endif

When a kernel is booted with this device tree, it should be possible to access an SD card supporting SPI interfacing in card slot 2 as well. As of the time of this writing, it is not: all data read from the SD card is zero. The cause of this is currently unknown.