R-Car/Boards/H3SK

Yocto-Gen3

Where to buy
Marutsu-elec : Japan only Shimafuji electric incorporated [NEW] : World Wide

H3 SK Manufacturing Plan
 1st lot : Jun or Jul, 2020 : Several dozen pcs  2nd lot : Aug or Sep, 2020 : About 100 pcs  3rd lot : Under planning

Introduction
This is the Wiki for the Renesas R-Car Starter Kit Premier board (RTP0RC7795SKB00010S). Refer to the R-Car page for information about Renesas' R-Car SoC family.

H3SK has several kinds of boards
 H3 WS1.1 silicon mounted board Type name: RTP0RC7795SKBX0010SA00  H3 WS2.0 silicon mounted board Type name: RTP0RC77951SKBX010SA00[S/N 2001~3000] (LPDDR4: DDR 4GiB(Samsung 1GB x4), eMMC 8GB(Samsung)) Type name: RTP0RC77951SKBX010SA00[S/N 3001~3300] (LPDDR4: DDR 4GiB(Samsung 1GB x4), eMMC 64GB(SanDisk)) Type name: RTP0RC77951SKBX010SA01[S/N 4001-4500] (LPDDR4: DDR 4GiB(Micron 1GB x4), eMMC 8GB(Micron)) Type name: RTP0RC77951SKBX010SA03[S/N 20001-20200] (LPDDR4: DDR 8GiB(Samsung 2GB x4), eMMC 32GB(Samsung)) Type name: RTP0RC77951SKBX010SA03[S/N 20201-20400] (LPDDR4: DDR 8GiB(Samsung 2GB x4), eMMC 32GB(SanDisk))

 H3 WS3.0 silicon mounted board Type name: RTP0RC77951SKBX010SA03[S/N 25051- ] (LPDDR4: DDR 8GiB(Samsung 2GB x4), eMMC 128GB(Samsung))



Hardware Features

 * R-CAR H3
 * ARM CA57 (ARMv8) 1.5 GHz quad core, with NEON/VFPv4, L1$ I/D 48K/32K, L2$ 2MB
 * ARM CA53 (ARMv8) 1.2 GHz quad core, with NEON/VFPv4, L1$ I/D 32K/32K, L2$ 512K
 * Memory controller for LPDDR4-3200 4GB in 2 channels, each 64-bit wide
 * Two- and three-dimensional graphics engines,
 * Video processing units,
 * 3 channels Display Output,
 * 6 channels Video Input,
 * SD card host interface,
 * USB3.0 and USB2.0 interfaces,
 * CAN interfaces
 * Ethernet AVB
 * PCI Express Interfaces
 * Memories
 * INTERNAL 384KB SYSTEM RAM
 * DDR 4 GB LPDDR4
 * HYPERFLASH 64 MB HYPER FLASH (512 MBITS, 160 MHZ, 320 MBYTES/S)
 * QSPI FLASH 16MB QSPI (128 MBITS,80 MHZ,80 MBYTES/S)1 HEADER QSPI MODULE
 * EMMC 8 GB EMMC (HS400 240 MBYTES/S)
 * MICROSD-CARD SLOT (SDR104 100 MBYTES/S)
 * Connectors
 * CN1 COM Express type connector 440pin
 * CN2 QSPI Flash module
 * CN3 DEBUG JTAG
 * CN4 HDMI
 * CN5 USB 2.0
 * CN6 Push-Pull microSD Card Socket
 * CN7 Ethernet, Connector, RJ45
 * CN8 LINE Out
 * CN9 MIC Input
 * CN10 DEBUG SERIAL (not populated)
 * CN11 CPLD Programming JTAG
 * CN12 DEBUG SERIAL (serial)
 * CN13 Main Power Supply input (5VDC)
 * CN14 CPU Fan
 * Switches
 * SW1 Hyper Flash
 * SW2 Software Readable DIPSWITCHES (4x)
 * SW3 Software Readable Push button
 * SW4 Software Readable Push button
 * SW5 Software Readable Push button
 * SW6 Mode Settings
 * SW7 CPLD Reset
 * SW8 Power
 * SW9 Reset
 * Board specifications
 * Dimensions: 95mm × 95mm
 * Board thickness: 1.6mm
 * External power supply 5V / 6A max, Ripple & Noise (Vp-p) Full load 200mV
 * T opr Operating ambient temperature 0°C to 40°C Do not expose to condensation
 * Vcc 5V system power supply voltage (range 5V +- 5%)
 * I board Maximum current consumption 8A, 40W

New H3SK

 * RTP0RC77951SKBX010SA00[S/N 3001-3300]
 * 1. Displayout Connector(CN4) moved to the upper side of the board.
 * 2. Added protection circuit (threshold: 5.15v).
 * If you incorrectly input 12V to H3SK, it doesn't break.
 * On the other hand, H3SK doesn't accept power supply of 5.15v or more by the protection circuit.
 * Recommended AC Adapter:
 * [PSAA20R-050L6] https://www.digikey.com/product-detail/en/phihong-usa/PSAA20R-050L6/993-1365-ND/5418517 picture_PSAA20R-050L6_20190213.jpg
 * [GST25U05-P1J ] https://www.mouser.jp/ProductDetail/MEAN-WELL/GST25U05-P1J?qs=sGAEpiMZZMt5w6YCUaBPUV4PLgOVZYgh46QsGbYViHyA1ECl3vWg8A== picture_GST25U05-P1J _20190213.jpg
 * [[File:Procedure_for_disabling_protection_circuit_0308.pdf]]
 * RTP0RC77951SKBX010SA03[S/N 20201-20400, 25051-25550]
 * 1. Displayout Connector(CN4) moved to the upper side of the board.
 * 2. Added protection circuit (threshold: 6.0v).
 * If you incorrectly input 12V to H3SK, it doesn't break.

Where to buy
R-Car Starter Kit Premier(WS2.0) board can be ordered from following distributors:

Click to buy R-Car Starter Kit Premier board from AVNET - World wide - Not available Click to by R-Car Starter Kit Premier board from FUTURE - World wide - Not available

Click to buy R-Car Starter Kit Premier board(RTP0RC77951SKBX010SA03(H3 v3.0) "S/N 25051-25550") from Marutsu-elec - Japan Only < Not available>

Click to by R-Car Starter Kit Premier board from chip1stop - Japan Only - Not available Click to buy R-Car Starter Kit Premier board from Digi-key - U.S only - Not available

R-Car H3 SoC Documentation

 * R-Car H3/M3 Device Manual

Official board documentation

 * Hardware Manual
 * Schematic(H3 ver1.1 & M3 ver1.0)
 * Schematic RTP0RC77951SKBX010SA00(H3 ver2.0)(S/N 2001-3000)
 * Schematic RTP0RC77951SKBX010SA00(H3 ver2.0)(S/N 3001-3300)
 * Schematic RTP0RC77951SKBX010SA03(H3 ver2.0 DDR8GB(S/N 20201-20400), H3 ver3.0 DDR8GB(S/N 25051-25550)
 * BOM list(H3 ver1.1 & M3 ver1.0)
 * BOM list(H3 ver2.0)
 * BOM list(H3 ver3.0)
 * Assembly drawing
 * CoM Express Interfaces

Kingfisher (R-Car Starter Kit extension board)
Instruction of using H3SK with the Kingfisher board located here http://elinux.org/R-Car/Boards/Kingfisher

Quick Start How To
This sections describes steps that are necessary to run a "Hello, World!" application using Yocto build. Both X11 and Wayland are supported.

Build Yocto image
Refer to Yocto for steps necessary for making a Yocto image.

Connect 5 V power supply to the board
Use 5 V power supply with a 5.5 mm barrel plug. The power supply should be able to provide 4(Min) ~ 8(Max)Amps.

Note
 * The recommended value is 8 Amps. But, user can use 4 Amps. and 6 Amps. (depends on the use case).

Connect to serial console
Use a microUSB cable to connect the PC to R-Car Starter Kit Premier (H3ULCB) board. CN12 ("CPLD/DEBUG") must be used on Starter Kit side. It is routed to SCIF2 in the R-Car H3 via a FT232 interface converter chip.

On Linux, FT232 driver is included with kernel versions >=2.6.12. Windows driver and sources can be found on FTDI Chip website.

Serial settings are 115200 8N1. Any standard terminal emulator program can be used.

On Linux:

picocom

sudo picocom -b 115200 DEVICE replace DEVICE with the proper tty device name, for example /dev/ttyUSB0. Running dmesg | tail can help locating proper device. After the successful connection, picocom should display:

picocom v1.7 port is       : /dev/ttyUSB0 flowcontrol   : none baudrate is   : 115200 parity is     : none databits are  : 8 escape is     : C-a local echo is : no noinit is      : no noreset is     : no nolock is      : no send_cmd is    : sz -vv receive_cmd is : rz -vv imap is       : omap is       : emap is       : crcrlf,delbs, Terminal ready

Use Ctrl+A, Ctrl+Q to exit picocom.

minicom

sudo minicom -b 115200 -D DEVICE replace DEVICE with the proper tty device name, for example /dev/ttyUSB0. Running dmesg | tail can help locating proper device. After the successful connection, minicom should display:

Welcome to minicom 2.6.2 OPTIONS: I18n Compiled on Aug 7 2013, 13:32:48. Port /dev/ttyUSB0 Press CTRL-A Z for help on special keys Use Ctrl+A, Q to exit minicom.

Power on the board and go to U-Boot prompt
Short-press SW8 "Power" to switch the board on. Then you should see the following output in the terminal: Welcome to minicom 2.7 OPTIONS: I18n Compiled on Jan 1 2014, 17:13:19. Port /dev/ttyUSB0, 18:31:48 Press CTRL-A Z for help on special keys NOTICE: BL2: R-Car Gen3 Initial Program Loader(CA57) Rev.1.0.9 NOTICE: BL2: PRR is R-Car H3 ES1.1 NOTICE: BL2: Boot device is HyperFlash(80MHz) NOTICE: BL2: LCM state is CM NOTICE:  BL2: AVS setting succeeded. DVFS_SetVID=0x52 NOTICE: BL2: DDR1600(rev.0.10) NOTICE: BL2: DRAM Split is 4ch NOTICE: BL2: QoS is default setting(rev.0.32) NOTICE: BL2: Lossy Decomp areas NOTICE:      Entry 0: DCMPAREACRAx:0x80000540 DCMPAREACRBx:0x570 NOTICE:      Entry 1: DCMPAREACRAx:0x40000000 DCMPAREACRBx:0x0 NOTICE:      Entry 2: DCMPAREACRAx:0x20000000 DCMPAREACRBx:0x0 NOTICE: BL2: v1.1(release):3ad02ac NOTICE: BL2: Built : 13:03:52, Sep 20 2016 NOTICE: BL2: Normal boot NOTICE: BL2: dst=0xe631a208 src=0x8180000 len=512(0x200) NOTICE: BL2: dst=0x43f00000 src=0x8180400 len=6144(0x1800) NOTICE: BL2: dst=0x44000000 src=0x81c0000 len=65536(0x10000) NOTICE: BL2: dst=0x44100000 src=0x8200000 len=524288(0x80000) NOTICE: BL2: dst=0x50000000 src=0x8640000 len=1048576(0x100000) U-Boot 2015.04 (Sep 23 2016 - 18:54:42) CPU: Renesas Electronics R8A7795 rev 1.1 Board: H3ULCB I2C:  ready DRAM: 3.9 GiB MMC:  sh-sdhi: 0, sh-sdhi: 1 In:   serial Out:  serial Err:  serial Net:  ravb Hit any key to stop autoboot: 3

Quickly hit any key to get into U-boot command prompt. Use SW9 ("Reset") to reboot the board when necessary. You should see the following:

Hit any key to stop autoboot: 0 =>

Change/update MAC address for Ethernet interface
In U-boot command line type: => setenv ethact ravb => setenv ethaddr aa:bb:cc:dd:ee:ff => saveenv

The original (board default) MAC address can be found on the label on top of RJ45 connector.

A user who purchased H3SK board must set the above by himself.

Configure U-Boot to boot over TFTP + NFS or from a micro SD card
Refer to Yocto page for steps necessary for running Yocto.

Serial Console
Use a micro-USB cable to connect to "Debug Serial-0" (CN10 for ws1.0, CN12 for ws1.1/ws2.0). Serial settings are 115200 8N1.

Booting Linux
* Kernel config: defconfig * Kernel image: arch/arm64/boot/Image * DTB (ws2.0): arch/arm64/boot/dts/renesas/r8a77951-ulcb.dtb * DTB (ws1.0/ws1.1): arch/arm64/boot/dts/renesas/r8a77950-ulcb.dtb

U-Boot boot command:

tftpboot 0x48080000 Image tftpboot 0x48000000 r8a77951-ulcb.dtb or r8a77950-ulcb.dtb booti 0x48080000 - 0x48000000

NOTE: ws2.0 silicon is supported Yocto v2.19 or later. NOTE: RTP0RC77951SKBX010SA03(DDR 8GiB) is supported Yocto v3.13.0 or later.

Kernel v5.5 and older used different DTB names: * DTB (ws2.0): arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dtb * DTB (ws1.0/ws1.1): arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb.dtb * DTB (RTP0RC77951SKBX010SA03(DDR 8GiB)): arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-4x2g.dtb

In case of DDR 4GiB board
RTP0RC77951SKBX010SA00 RTP0RC77951SKBX010SA01

In case of DDR 8GiB board
RTP0RC77951SKBX010SA03 

 Power off the board  Press SW8  Set SW and JP as follows:  SW1=OFF ws1.0: SW6[all]=OFF ws1.1/ws2.0: SW6[1]=ON, SW6[2]=ON, SW6[3]=OFF, SW6[4]=ON JP1 -> 1-2 short  Power on the board  Press SW8 Minimonitor starts and provides prompts on console   Change SW as follows:  SW1=ON ws1.0: SW6[3]=ON ws1.1: SW6[1]=OFF, SW6[3]=ON ws2.0: SW6[3]=ON  Flash bootparam_sa0.srec. In console execute xls2 command (load program to hyper flash) and provide the following inputs: </li> 3 y e6320000 0 type "ctrl+A S" and select upload method "ascii", then choose file for uploading "bootparam_sa0.srec", after upload finished press any key y

 Flash bl2-h3ulcb.srec. In console execute xls2 command (load program to hyper flash) and provide the following inputs: </li> 3 y e6304000 (e6302000 if using Yocto BSP versions v2.12 and v2.16) 40000 type "ctrl+A S" and select upload method "ascii", then choose file for uploading "bl2-h3ulcb.srec", after upload finished press any key y

 Flash cert_header_sa6.srec. In console execute xls2 command (load program to hyper flash) and provide the following inputs: </li> 3 y e6320000 180000 type "ctrl+A S" and select upload method "ascii", then choose file for uploading "cert_header_sa6.srec", after upload finished press any key y

 Flash bl31-h3ulcb.srec. In console execute xls2 command (load program to hyper flash) and provide the following inputs: </li> 3 y 44000000 1C0000 type "ctrl+A S" and select upload method "ascii", then choose file for uploading "bl31-h3ulcb.srec", after upload finished press any key y

 Flash tee-h3ulcb.srec. In console execute xls2 command (load program to hyper flash) and provide the following inputs: </li> 3 y 44100000 200000 type "ctrl+A S" and select upload method "ascii", then choose file for uploading "tee-h3ulcb.srec", after upload finished press any key y

 Flash u-boot-elf.srec. In console execute xls2 command (load program to hyper flash) and provide the following inputs: </li> 3 y 50000000 (49000000 if using Yocto BSP version v2.12) 640000 type "ctrl+A S" and select upload method "ascii", then choose file for uploading "u-boot-elf.srec", after upload finished press any key y

 Reset the board </li> Press SW9

</ol>

Known Issues
<ol> Some H3 v2.0 SK(RTP0RC77951SKBX010SA00) have been confirmed to freeze the system (Ex. Yocto v2.23.1, v3.4.0, v3.6.0 and v3.7.0). If it stops please update to Yocto v3.9.0 or later. </li>  The following H3 Starter Kit boards have PCIe 1ch disabled. Serial Number: 3001-3300 Serial Number: 20201-20400 [Note] Please check the Serial Number carefully on your board. How to enable: <ol>  Connect WinPC and H3 Starter Kit board(CN12) with a USB cable   [H3 SK] Power on   [WinPC] Run the exe(*) file   [WinPC] Select "OK" <li/> <li> [WinPC] If you succeed, you can confirm the "CPLD configured successfully (New version:2019/04/08)".<li/> (*)  <TIPS> If you fail, try another winPC or try USB HUB(WinPC -- USB HUB -- USB Cable -- H3 SK(CN12)). </li> </ol>
 * If you don't use PCIe 1ch, ignore this "Known Issue".
 * PCIe 1ch is connected to ComEx(CN1) of H3 Starter Kit.

Limitation
<ol> Yocto v3.4 or later don't support H3 v1.1 Starter Kit (RTP0RC7795SKBX0010SA00). Please use the H3 v2.0 SK. </ol>

FAQ
http://elinux.org/Talk:R-Car/Boards/Yocto-Gen3

Appendix
<ol> <li> RTP0RC77951SKBX010SA03 board with 8GB DDR support is available in Yocto v3.9.0. <How to build> https://elinux.org/R-Car/Boards/Yocto-Gen3#Building_the_BSP_for_Renesas_H3_Starter_Kit.2C_M3_Starter_Kit 1-1. after "step 10" Edit local.conf and select the board type Add the following lines to local.conf to enable 8GB support: H3_OPTION_forcevariable = "1" 1-2. after "step 11(12, 13)" You can find new dtb files in the images directory: ls -1 tmp/deploy/images/h3ulcb/Image-r8a7795-h3ulcb-4x2g*.dtb tmp/deploy/images/h3ulcb/Image-r8a7795-h3ulcb-4x2g-kf.dtb tmp/deploy/images/h3ulcb/Image-r8a7795-h3ulcb-4x2g-vb2.1.dtb tmp/deploy/images/h3ulcb/Image-r8a7795-h3ulcb-4x2g-vb2.dtb tmp/deploy/images/h3ulcb/Image-r8a7795-h3ulcb-4x2g-vb.dtb ARM Trusted Firmware and U-Boot images will now have 8GB DDR support: tmp/deploy/images/h3ulcb/bl2-h3ulcb.srec tmp/deploy/images/h3ulcb/bl31-h3ulcb.srec tmp/deploy/images/h3ulcb/cert_header_sa6.srec tmp/deploy/images/h3ulcb/u-boot-elf-h3ulcb.srec Note: If you change "H3_OPTION", please clean before building. </li> </ol>
 * 1) For H3 SiP DDR 8GiB (2GiB x 4ch)
 * 1) vi ./conf/local.conf
 * 2) bitbake -c cleanall arm-trusted-firmware u-boot
 * 3) bitbake arm-trusted-firmware u-boot