RPi Low-level peripherals

Introduction
The Rpi allows peripherals and expansion boards (such as the upcoming Rpi Gertboard) to access the CPU by exposing the in and outputs. The production board has a 26-pin 2.54mm (100mil) expansion header, arranged in a 2x13 strip. They provide 8 GPIO pins plus access to I2C, SPI, UART), as well as +3V3, +5V and GND supply lines. Pin one is column 0 on the bottom row.

Voltage levels are 3v3. There is no over-voltage protection on the board - the intention is that people interested in serious interfacing will use an external board with buffers, level conversion and analog I/O rather than soldering directly onto the main board.

It is also possible to reconfigure some of the pins to provide a second I2C interface. [no-ref]

Kernel boot messages go to the UART at 115200bps.

Header Pinout:

KiCad symbol:

Power pins
Maximum permitted current draw from the 3v3 pin is 50mA.

Maximum permitted current draw from the 5v pin is the USB input current (usually 1A) minus any current draw from the rest of the board.
 * Model A: 1000mA - 500mA -> max power draw: 500mA
 * Model B: 1000mA - 700mA -> max power draw: 300mA

General Purpose Input/Output (GPIO)
General Purpose Input/Output (a.k.a. GPIO) is a generic pin on a chip whose behavior (including whether it is an input or output pin) can be controlled (programmed) through software. For more information see:the wikipedia article.

On the production board, all the UART, SPI and I2C pins can be reconfigured as GPIO pins, to provide a total of 17 GPIO pins. . Each of their functions are detailed in the chipset datasheet

The availabile alternative functions and their corresponding pins are detailed below. These numbers are in reference to the chipset documentation and may not match the numbers exposed in linux or detailed above. Only fully usable functions are detailed, for some alternative functions not all the necessary pins are available for the funtionality to be actually used. All exposed pins can be used for GPIO

Top Row Pinout:

Bottom Row Pinout:

The complete list of chipset pins which are available is: 0, 1, 4, 7, 8, 9, 10, 11, 14, 15, 17, 18, 21, 22, 23, 24, 25

Pin 12 supports PWM.

GPIO voltage level is 3V3 and are not 5V tolerant.

Each GPIO can interrupt, high/low/rise/fall/change.

It is also possible to reconfigure some of the pins to provide an ARM JTAG interface. However ARM_TMS isn't available for this (chipset pin 12 or 27 is needed).

It is also possible to reconfigure some of the pins to provide an I2S (hardware mod may be required ) or PCM interface.

Driver support
The Foundation will not include a GPIO driver in the initial release, standard linux GPIO drivers should work with minimal modification. The Foundation will not include an SPI driver in the initial release, we hope the community might write one. The Foundation will not include an I2C driver in the initial release, we hope the community might provide one, standard linux I2C drivers should work with minimal modification.

Code examples
Gert van Loo & Dom, has provided some tested code which accesses the GPIO pins through direct GPIO register manipulation in C-code. (Thanks to Dom for doing the difficult work of finding and testing the mapping.) Example GPIO code:

// // How to access GPIO registers from C-code on the Raspberry-Pi // Example program // 15-January-2012 // Dom and Gert //

// Access from ARM Running Linux


 * 1) define BCM2708_PERI_BASE       0x20000000
 * 2) define GPIO_BASE               (BCM2708_PERI_BASE + 0x200000) /* GPIO controller */


 * 1) include 
 * 2) include 
 * 3) include 
 * 4) include 
 * 5) include 
 * 6) include 
 * 7) include 
 * 8) include 
 * 9) include 


 * 1) include 


 * 1) define PAGE_SIZE (4*1024)
 * 2) define BLOCK_SIZE (4*1024)

int mem_fd; char *gpio_mem, *gpio_map; char *spi0_mem, *spi0_map;

// I/O access volatile unsigned *gpio;

// GPIO setup macros. Always use INP_GPIO(x) before using OUT_GPIO(x) or SET_GPIO_ALT(x,y)
 * 1) define INP_GPIO(g) *(gpio+((g)/10)) &= ~(7<<(((g)%10)*3))
 * 2) define OUT_GPIO(g) *(gpio+((g)/10)) |= (1<<(((g)%10)*3))
 * 3) define SET_GPIO_ALT(g,a) *(gpio+(((g)/10))) |= (((a)<=3?(a)+4:(a)==4?3:2)<<(((g)%10)*3))


 * 1) define GPIO_SET *(gpio+7) // sets   bits which are 1 ignores bits which are 0
 * 2) define GPIO_CLR *(gpio+10) // clears bits which are 1 ignores bits which are 0

void setup_io;

int main(int argc, char **argv) { int g,rep;

// Set up gpi pointer for direct register access setup_io;

// Switch GPIO 7..11 to output mode

/************************************************************************\ * You are about to change the GPIO settings of your computer. * * Mess this up and it will stop working! * * It might be a good idea to 'sync' before running this program        * * so at least you still have your code changes written to the SD-card! * \************************************************************************/

// Set GPIO pins 7-11 to output for (g=7; g<=11; g++) {   INP_GPIO(g); // must use INP_GPIO before we can use OUT_GPIO OUT_GPIO(g); }

for (rep=0; rep<10; rep++) {    for (g=7; g<=11; g++) {      GPIO_SET = 1<<g; sleep(1); }    for (g=7; g<=11; g++) {      GPIO_CLR = 1<<g; sleep(1); } }

return 0;

} // main

// // Set up a memory regions to access GPIO // void setup_io {

/* open /dev/mem */ if ((mem_fd = open("/dev/mem", O_RDWR|O_SYNC) ) < 0) { printf("can't open /dev/mem \n"); exit (-1); }

/* mmap GPIO */

// Allocate MAP block if ((gpio_mem = malloc(BLOCK_SIZE + (PAGE_SIZE-1))) == NULL) { printf("allocation error \n"); exit (-1); }

// Make sure pointer is on 4K boundary if ((unsigned long)gpio_mem % PAGE_SIZE) gpio_mem += PAGE_SIZE - ((unsigned long)gpio_mem % PAGE_SIZE);

// Now map it  gpio_map = (unsigned char *)mmap(      (caddr_t)gpio_mem,      BLOCK_SIZE,      PROT_READ|PROT_WRITE,      MAP_SHARED|MAP_FIXED,      mem_fd,      GPIO_BASE   );

if ((long)gpio_map < 0) { printf("mmap error %d\n", (int)gpio_map); exit (-1); }

// Always use volatile pointer! gpio = (volatile unsigned *)gpio_map;

} // setup_io

MIPI CSI-2
On the production board, we bring out the MIPI CSI-2 interface to pads for an unpopulated 15-way flat flex connector

is Sony sub-LVDS same as MIPI CSI-2? Sony IMX020 5Mbip module is available for $5-7 (SE K850i replacement camera).

Looks like Nokia N95 uses CSI-2 5Mpix camera module with autofocus. ~$15 replacement part.

DSI
On the production board, we bring out the DSI interface to pads for an unpopulated 15-way flat flex connector

CEC
HDMI-CEC (Consumer Electronics Control for HDMI) is supported by hardware but some driver work will be needed and currently isn't exposed into Linux userland. Eben notes that he has seen CEC demos on the Broadcom SoC they are using.

For more information about HDMI-CEC and what you could do with it on the Raspberry Pi please see the CEC (Consumer Electronics Control) over HDMI article.