Embedded Open Modular Architecture/CompactFlash

= EOMA/CF =

page under development. this standard is virtually identical to EOMA/PCMCIA except that the 24-pin RGB/TTL has been replaced by single-channel LVDS, leaving 2 pins spare which have presently been allocated to provide extra 5V power.

the disadvantage of single-channel LVDS is that it is not sufficient to drive resolutions above 1280x1024 @ 75hz (24-bit) but if a lower refresh rate (40hz, 30hz) is acceptable, and/or a lower bitrate (18-bit) then it is possible to drive 1920x1080 at about 60hz for 18-bit or 47hz for 24-bit.

this standard is primarily designed for ultra-low-cost systems as well as those where space is at a premium. because of this, specifying MIPI as the LCD standard would be inappropriate, whereas many SoCs now have single-channel or in some case dual-channel LVDS available as standard. even in cases where the SoC does not have LVDS, a low-cost RGB/TTL to LVDS IC is available such as the [TI SN75LVDS83b](http://www.ti.com/product/sn75lvds83).

= Pinouts =


 * 1 	 RIN 0-  	 Negative LVDS differential data input
 * 26 	RIN 0+ 	Positive LVDS differential data input
 * 2 	RIN 1- 	Negative LVDS differential data input
 * 27 	RIN 1+ 	Positive LVDS differential data input
 * 3 	RIN 2- 	Negative LVDS differential data input
 * 28 	RIN 2+ 	Positive LVDS differential data input
 * 4 	CLKIN- 	Negative LVDS differential clock input
 * 29 	CLKIN+ 	Positive LVDS differential clock input
 * 5 GND
 * 30 GND
 * 6 10/100 Ethernet (TX+)
 * 31 10/100 Ethernet (TX-)
 * 7 10/100 Ethernet (RX+)
 * 32 10/100 Ethernet (RX-)
 * 8 GROUND
 * 33 GROUND
 * 9 USB2 (Data+)
 * 34 USB2 (Data-)
 * 10 GROUND
 * 35 GROUND
 * 11 I2C Clock (SCL)
 * 36 I2C Data (SDA)
 * 12 PWR (5.0V)
 * 37 PWR (5.0v)
 * 13 PWR (5.0V)
 * 38 PWR (5.0v)
 * 14 GPIO (0)
 * 39 GPIO (1)
 * 15 GPIO (2)
 * 40 GPIO (3)
 * 16 GPIO (4)
 * 41 GPIO (5)
 * 17 GPIO (6)
 * 42 GPIO (7)
 * 18 GPIO (8)
 * 43 GPIO (9)
 * 19 GPIO (10)
 * 44 GPIO (11)
 * 20 GPIO (12)
 * 45 GPIO (13)
 * 21 GPIO (14)
 * 46 GPIO (15)
 * 22 GROUND
 * 47 GROUND
 * 23 SATA-II Transmit (A+)
 * 48 SATA-II Transmit (A-)
 * 24 GROUND
 * 49 GROUND
 * 25 SATA-II Receive (B+)
 * 50 SATA-II Receive (B-)

= Example CPU Card =



This example CPU Card shows what is possible. It comprises an Allwinner A10 (Cortex A8), 2 DDR RAM ICs, 2 NAND Flash ICs, an AXP209 PMIC, an RTL8120 10/100 Ethernet PHY, yet leaves enough room for Micro-HDMI, USB-OTG and a Headphone socket. Missing from this diagram is where to put a MicroSD slot (hence the "under development" sign on this page). Potentially it could go on the underneath side (BOTTOM).

= Prevention of insertion of standard CF Cards =

To stop EOMA/CF cards from being inserted into standard CF slots, it will probably be necessary for the EOMA/CF cards to be a little bit thicker than standard CF cards, and potentially slightly wider at the very end (nearest the sockets). This would limit the number of sockets that could be used, however examination of some of 3M's sockets shows that the ejector mechanism is only down one side.