Adventures in (simulated) Asymmetric Scheduling - Pantelis Antoniou, Antoniou Consulting
Asymmetric processing, spearheaded by ARM's big.LITTLE architecture, has been touted as a method for solving both the power & performance problem of mobile devices. This architecture requires changes to core scheduling concepts, which are extremely difficult to debug and diagnose, especially since existing tools do not capture useful data for evaluating such a system. A brief overview of the proposed scheduling changes will be presented, with major focus on Paul Turner's load average patches. Methods of simulating an asymmetric system will be described. Additionally a portable process workload capturing method, based on perf, will be presented, i.e. one can capture traces from an Android based system and run it on a standard Linux box.