BeagleBoard/GSoC/2017 Projects

From eLinux.org
< BeagleBoard‎ | GSoC
Revision as of 19:25, 12 September 2017 by Ee (Talk | contribs) (Added BeagleLibs Final Video)

(diff) ← Older revision | Latest revision (diff) | Newer revision → (diff)
Jump to: navigation, search

Links

Project: Template Project, please copy first and then edit

Video Title

“Project Name”. add your project description here.


Project: BeagleBone AVB Stack

GSoC 2017 - Beagle Bone AVB Stack

Building a AVB node,the stream reservation protocol and the precision time protocol in the linux kernel. A demo application will be included for a stereo speaker system with two individual beagle boards. The first board will decode a stereo audio file (ex: mp3 files stored in local disk) and play one channel of the audio through its speakers (ex: left channel) and then it transmits the second channel (ex: right channel) to the second device over AVB which plays back the second channel through its speakers. The objective is to achieve frame synchronization over such a system. This can be tested by recording the output from both devices and analyzing with an audio analyzer. In this case one device acts as a AVB master node and the second device acts as a AVB slave node.

Project: BeagleWire software support

Video Title

The BeagleWire is an FPGA development platform that has been designed for use with BeagleBone boards. BeagleWire is a cape on which there is FPGA device - Lattice iCE40HX. The Lattice iCE40 is a family of FPGAs with a minimalistic architecture and very regular structure, designed for low-cost, high-volume consumer and system applications. The significance of FPGAs is continuously increasing, as they are more and more often used for supporting work of ARM processors. BeagleWire does not require external tools (JTAG) and the whole software is Open Source. iCE40 is an energy saving device, allowing to work with small batteries. FPGA cape allows easy and low cost start for beginners who would like to take their first steps in working with FPGAs. The developed software will be an easy and, at the same time, efficient tool for communication with FPGA. At this point FPGA will be able to meet the requirements of even more advanced applications. The BeagleWire creates a powerful and versatile digital cape for users to create their imaginative digital designs. The task is to create software support for FPGA cape (based on iCE40 device). The completed project will provide the BeagleBoard.org community with easy to implement and powerful tools for realization of projects based on Programmable Logic Device(FPGA), which will surely increase the number of applications based on it.


Project: BeagleLibs

BeagleLibs GSoC 2017 Intro Video
BeagleLibs GSoC 2017 Final Video

My project is basically two high quality, well-documented libraries for interfacing with BeagleBone hardware in Rust and Go. These libraries will provide interfaces for common usecases like GPIO, ADC reads, PWM, UART, SPI, and I2C (I'm open to more!). The intent of the project is to bridge the gap between the lower level and the higher level languages and make using the BeagleBone accessible to a wider range of users.

People trying to get into hardware projects today are faced with difficult choices, especially when it comes to the platform their project will be based on. The BeagleBone community has made an great strides toward bridging this gap by with the cheap and approachable BeagleBones, but users are still confronted with the choice of fast/difficult to use C, or easy to use/slow JavaScript.

Users seeking to work on the BeagleBone shouldn't have to face this choice; which is where this project comes in. By providing a well-documented set of libraries for the common tasks that every hardware project uses, users will be able to harness the power of performant languages while still having a pleasant development process.


Project: BeagleBoot

GSoC 2017 - BeagleBoot

Currently, the ways to flash images in BeagleBone hardware are not easy especially for beginners, SD card method takes up much time and manual configuration, BBBlfs flashing tool works but is CLI based, not much reliable and works on limited platforms, TI's Uniflash tool is also old and works only under older versions of Windows and Linux with a lot of manual configuration. The project is to port the BeagleBone bootloader server BBBlfs(currently written in c) to JavaScript(node.js) and make a cross platform GUI (using electron framework) flashing tool utilising the etcher.io project. This will allow us to have single code base for a cross platform tool.

The tool works as:

1. TFTP transfer of SPL binary and u-boot.
2. Utilizing the ums feature of u-boot, booting the BB hardware into USB mass storage mode.
3. Flashing the BB hardware with etcher.io like tool.

This project project will be really helpful for everybody especially newbies, who would have a nice experience with flashing images easily and faster, so that they can focus on the more important stuff be it their robotics project, kernel development or some new PRU hack.

Project: Sonic Anemometer

GSoC 2017 - BeagleBoot

Write program for PRU present in BeagleBoard and to create a portable device able to measure the wind speed and temperature reliably in outdoor environments.It delivers the result by analyzing the time of flight or phase difference of sound waves between two points, deliver the final results in terms of ambient Temperature,Wind speed and direction.Considering the costs of commercial products available at this time in market, this open source project would provide a very useful and reliable anemometer to help universities and students/hobbyists during their meteorological research by providing them results in real time and format that can be further processed by user using languages like python etc.

Project: BeagleBoard/GSoC/BeagleBone PRU DMA

BeagleBone PRU DMA

Most of existing PRU applications utilize (waste) one PRU core for data transfer. The goal of this project is to enable usage of EDMA controller for copying of data to and from main memory (DDR), which would allow applications to use both cores for computation.