BeagleBoard/GSoC/2020 Projects/PRU Bi-dir bus

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{{#ev:youtube|Jl3sUq2WwcY||right|BeagleLogic}} About Student: Deepankar
Mentors: Jason Kridner Zubeen Tolani

GSoC: [N/A]


Basic Ground work has started. can be viewd here


All the requirements listed on the ideas page are fulfilled.Pull request is pull

About you

IRC: deepankar
School: Techniche Hochschule Deggendorf
Country: Germany
Primary language (We have mentors who speak multiple languages): English
Typical work hours (We have mentors in various time zones): 8AM-5PM CET
Previous GSoC participation: I highly appreciate the contribution of opensource community, i have learnt alot of things and could use alot of softwares because they are freely avialble in opensource. By participating in GSoC i want to contribute back to the community and in the process want to learn new things and make new likeminded friends

About your project

Project name: Reference Design and Cape For A GPIO-based Parallel Bi-Directional Bus.t

Briefly,The basic idea is to extend the i/o ports using universal shift registor so as to create a possibility for projects that require large no of i/o. Further it is required to write Drivers and userspace library to access additional i/o from linux user space


The solution I am proposing involves external universal shift register which will interface with the Beagle bone using the PRU and will also be accessible from the linux system using ioctl calls. This could be a very interesting solution that can enable the community to do stuff with beaglebone which were earlier not easily implementable due to lack of gpio pins. This can have a lot of applications in interfacing multicolor LEDs and creating animations and also as mentioned in the problem statement can be used to control game controllers. Here the emphasis is on interfacing with PRU so that the extened I/O can also be used for time critical tasks. As we know the standard linux variant that comes with beaglebone is a non preemptive Linux variant that means there is limit to doing high frequency tasks in a reliable manner. The idea here is to interface the universal shift register CD54HC299 (CD54HC299 available in PDIP package so can be usedd on breadbaord,SN54F299 which was mentioned on the idea page is obsolete.)with the PRU and then these PRU can be controlled from the main arm processor using ioctl calls and Remoteproc utility. The implementation of software for the PRU will be in c language. The main challenge here will be to understand the timing diagram in the shift registers datasheet and then implement a code to communicate accordingly. Basically a shift register is composed to D flipflops which are chained together and can be used to do SIPO, SISO,PISO,PIPO operations. In our universal shift register There are also 3 different modes in the universal shift registers which can be used to perform input output operations or doing a parallel data load. The plan is to connect LEDs to the output and play with the modes once the firmware is up and running then switch to kernal stuff. We would be requiring to wirte an LKM to communicate with PRU in linux userspace. These LKM are also written in c/c ++ language with some special kernal specific syntex.Then Once everything is up and running, I would like to make PCB board in shield/cape form factor with the shiftregister chip and few LEDs,and LCD and button so that in future people can play around with such chips more easily and can integrate them in their i/o intensive projects.

IMPORTANT User by the name Jkridner in the IRC pointed me to previous year GSoC ( where a shift register was interfaced using assembly language.But as i could see the communication with main processor could be implemented using RemoteProc which is now supported on the latest kernal.My solution is using a c language approach which would attract more user base than assembly. Further i am extending the work to make a cape on this reference design. I also intend to do a step by step wikis so that a beginner can easily understand and test simple i/o features.


Provide a development timeline with a milestone each of the 11 weeks and any pre-work. (A realistic timeline is critical to our selection process.)

Mar 30 Proposal complete, Submitted to
Apr 27 Proposal accepted or rejected
May 18 Pre-work complete, Coding officially begins!. By this day i plan to go through following Books to have holistic understanding and note/mark important sections that can be of help directly and indirectly in my implementation

1.exploring Beaglebone by Derek
2. Linux driver Cookbook
Review of existing similar work on other SoC platform
Understand the theory of configuring pins and logic levels and study of modes of GPIO.
Installation of necessary software and crossplatform toolchain and debugging tools for development on eclipse
Discuss any changes in the timeline or approach with the mentor
Arranging shift register IC 74hc299 74hc595 and otherhardware

May 25 Introductory YouTube video and setup of hardware

Hands on with the basics of GPIO, pullup configurations and logic levels to get the practical grasp of Beaglebone hardware. Test Buttons, LCD, LED with normal gpio operations
setup shift register on breadboard and make necessay connections with beaglebone
Explore more about the device tree and device driver development
Study of of Timing diagram and attempts to bitbang the IC and write c code to interface Beaglebone
Analysing the code communication with shiftregister using oscciloscope/logic analyser

June 1 By this time I would have tested interfacing PRU in c with simple hardware like buttons and LED

Testing and debugging of the circuit for taking parallel inputs on the single GPIO(data line) using shift register made on breadboard.

June 8 extending functionality to implement different modes shift left and load parallel data and interfacing buttons , LEDs and 16X2 LCD using the Shiftregister
June 15 18:00 UTC Extending the knowhow of LKM and integrate support for simple GPIO configuration from kernal space

Documentation, cleanup and
Milestone #4, Mentors and students can begin submitting Phase 1 evaluations

June 19 18:00 UTC Phase 1 Evaluation deadline

Target will be to explore communication mechanisms between main processor and PRU
This includes exploring uio_pruss and pru_rproc

June 22 Device tree ovrlays to integrate hardware
June 29 Extending the basic LKM and remoteproc/pru_rproc calls and bidirectional communication and studing
July 6 Starting the schematic design for the cape and planning the power source out of the 3 sources on Beaglebone or external power that would go through the cape and will power the beaglebone

Planning the schematic to achieve such a design that the cape can be used to quicky evaluate the bidirectional bus but can also be extended (research for the common use cases)
Planning for a robust and safe design to protect against mishandling like reversing the polarity or supporting a 5v operated device
Desciding on adding a memory to allow auto configuration or cape manager. Also required footprint will be designed which are not already available.

July 13 18:00 UTC Routing will be in process ERC, DRC, Slik screens and reviewd by mentor
July 17 18:00 UTC Gerbers will be sent to boardhouse, Documentation and 3D of boards will be generated
July 20 Waiting for boards from boardhouse and meanwhile working on userspace library for Communication with the board and Cape manager and auto configurations
July 27 Boards will be received back and will be tested any further updates in the design, debugging.
August 3 Completion Video and final work , examples with comments for users and wiki pages
August 10 - 17 18:00 UTC Buffer time for any problems:Final week: Students submit their final work product and their final mentor evaluation
August 17 - 24 18:00 UTC Documentation and final improvements Mentors submit final student evaluations

There will be many wikis that will explain the steps, i want to make life easier for the noobs and beginners as it is sometimes very difficult to understand codes on github

Experience and approach

I have studied hardware and software design, with my bachelors in Electronics and Communication which was more focused on understanding digital circuits, analog circuits and several other important aspects of hardware , my current course which is a Masters course in Applied computer science (focus area: Embedded systems) focuses extensively on c language, linux OS, FPGA and writing software for low level hardware. Moreover I have worked as Junior design Fellow at University of Delhi which was a full time job where I played with discrete hardware elements, varies ICs and did a lot of testing on breadboard using oscilloscope and software tools.
My projects can be seen on my website and on my youtube channel Youtube-Deepankar.

I also did one project where i extended the i/o of atmega328P with TLC5940 chip which gave me PWM capabilities and ability to control 9 Tricolour LEDs with few arduino pins .Link to board files and software is here TLCbasedcoaster

Further my resume can help you access my capabilites Resume
Since in my job roles I worked in a small team of interdisciplinary people I had to handle different aspects of embedded system design which has given me suitable experience to undertake this task that require multiple skills To be precise the strategy will be:

The development task can be divided into three parts:
1. Getting the shift register up and running.
2. Controlling the shift register modes from linux user space using ioctl calls
3. Design a board on Eagle cad to make things easier to do for other community members.
Final Deliverables promised
1.Firmware for PRU,
2.LKM to allow control from linux user space,
3.Design files for PCB,
4.Wiki pages for documentation and short video at the beginning and end


I can ask my questions on GSoC IRC. Further i have been active in different DIY forums for long time, I have been contributor to element14 forums and hackaday,.Further I think I also have good collection of books, some colleagues who have worked with beagle bone and my linux professor whom I can ask to help in the most difficult times. The technical reference manuals provided by TI on am3358 and am5729 can also be of great help


I think this will openup a new way to easily do projects that require too many i/o when using the LCDs and HDMI, the beaglebone is left with few pins to do other gpio intensive stuff. Also with this hardware the PRUs can be put to more extensive use and can can unleash its potential for it being a very capable component that can precisely control critical things.