Difference between revisions of "BeagleBoard/SPI"

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(Background)
m (Fixed links to markmail.)
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* [http://groups.google.com/group/beagleboard/browse_thread/thread/d6a4e0703033cada|SPI testing]
 
* [http://groups.google.com/group/beagleboard/browse_thread/thread/d6a4e0703033cada|SPI testing]
 
* [http://groups.google.com/group/beagleboard/browse_thread/thread/320ceba30172fba5/9db5bcf44392d4a0?show_docid=9db5bcf44392d4a0|SPI Troubles]
 
* [http://groups.google.com/group/beagleboard/browse_thread/thread/320ceba30172fba5/9db5bcf44392d4a0?show_docid=9db5bcf44392d4a0|SPI Troubles]
* [http://markmail.org/message/ktm4e2qytiv4tcm3|SPI with Beagleboard (for a newbie in Linux)]
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* [http://markmail.org/message/ktm4e2qytiv4tcm3 |SPI with Beagleboard (for a newbie in Linux)]
* [http://markmail.org/thread/oyrfigv37df26223|McSPI with REV C]
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* [http://markmail.org/thread/oyrfigv37df26223 |McSPI with REV C]

Revision as of 16:27, 30 April 2010

Background

Serial Perhiperal Interface (also known under the names of Microwire or four-wire) is a general-purpose digital I/O interface used by many ICs including sensors, converters, audio codecs, and various types of memory. An SPI bus consists of at least three pins: a clock, a slave-input/master-output (SIMO) pin, a slave-output/master-input (SOMI) pin, and zero or more chip-select(CS) pins.

The OMAP3 has four McSPI controllers, each capable of driving an SPI interface at up to 48 MHz. Each of these controllers has a finite number of chip select lines. Of these four, only SPI3 and SPI4 are brought out on the BeagleBoard.

  • McSPI1: 4 channels
  • McSPI2: 2 channels
  • McSPI3: 3 channels (2 CS brought out)
  • McSPI4: 1 channel (1 CS brought out)

Below is a description of the steps necessary to use SPI on BeagleBoard. If you are particularly impatient, you can start with one of the patches found in the Kernel Patches section.

Configuring Pinmux

These devices are fully supported by the Linux kernel's mcspi driver. That being said, one will need to make some minor modifications to the BeagleBoard's board file (arch/arm/mach-omap2/board-omap3beagle.c) in order to use them.

First, the pin multiplexer needs to be configured to expose the McSPI signals. As of BeagleBoard rev.C4, the following SPI signals are available on the Beagle's 28-pin expansion header; the SPI signals are available in pinmux mode 1, while mode 0 names are also given for reference.

McSPI 3
Header Pin Mode 0 Mode 1 (SPI) Pinmux configuration
21 MMC2_CLKO McSPI3_CLK OMAP_PIN_INPUT (*)
17 MMC2_DAT0 McSPI3_SOMI OMAP_PIN_INPUT
19 MMC2_CMD McSPI3_SIMO OMAP_PIN_OUTPUT
11 MMC2_DAT3 McSPI3_CS0 OMAP_PIN_OUTPUT
13 MMC2_DAT2 McSPI3_CS1 OMAP_PIN_OUTPUT
McSPI 4
Header Pin Mode 0 Mode 1 (SPI) Pinmux configuration
20 BcBSP1_CLKR McSPI4_CLK OMAP_PIN_INPUT (*)
18 McBSP1_DR McSPI4_SOMI OMAP_PIN_INPUT
12 McBSP1_DX McSPI4_SIMO OMAP_PIN_OUTPUT
16 McBSP1_FSX McSPI4_CS0 OMAP_PIN_OUTPUT

(*) Important: The CLK pins must be put in input mode for the chip to correctly register input on SOMI. Failure to set CLK as an input will result in all reads producing zeros.

Configuring spi_board_info

In addition to the pin multiplexer, one must also tell the kernel a bit about the SPI controller itself. This is done in the board file using an spi_board_info struct. For example, to configure McSPI3.0, one might use the following,

static struct spi_board_info beagle_mcspi_board_info = {
	.modalias	= "spidev",
	.max_speed_hz	= 48000000, //48 Mbps
	.bus_num	= 3,
	.chip_select	= 0,	
	.mode = SPI_MODE_1,
};

One would then register this with the SPI subsystem during board initialization (i.e. omap3_beagle_init()), with the following,

spi_register_board_info(beagle_mcspi_board_info,
	ARRAY_SIZE(beagle_mcspi_board_info));

Patches

This patch was developed against 2.6.32 and exposes through spidev all of the McSPI controllers and chip selects brought out on the BeagleBoard.

Discussion

Here are some mailing list threads of various peoples' experiences getting SPI running on the Beagle: