Difference between revisions of "Beagleboard gsoc 2019 bi-directional progress"

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m (Date : 14 June 2019)
m (Date : 15 June 2019)
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** To test these code started to make my own set of activated pins in the device tree in the folder  
 
** To test these code started to make my own set of activated pins in the device tree in the folder  
 
  /lib/firmware
 
  /lib/firmware
 +
==== Date : 15 June 2019 ====
 +
*Till Now
 +
** making the device tree for the program but the problem is that pin available from the pru is scatted as pins are their but some give functionality of both input and output is less.
 +
** https://gist.github.com/pranav083/263142be5e0480025b2f7cd2a78ed631 here is the done work till now
 +
** '''Note:''' the above stated pins are now for demonstration purpose reference purpose .Just testing the derek molloy style of activating the ports of pru through the device tree.
 +
** But the problem that still remains that how the p8_15 will activated as previous day guide shows that p8_13 can be controlled with register r30 and bit no. 15.
 +
* Blocker
 +
** will raise the concern with my mentor about this and the project is going on slow speed i want to make the things a little bit fast.

Revision as of 15:55, 15 June 2019

About Me

IRC: pranav_kumar
Github: https://github.com/pranav083
E-Linux Username: pranav083
School: UIET,Panjab University,Chandigarh
Country: India
Primary language: English,Hindi
Typical work hours: 9:30 - 23:00 IST GMT/EST/PST to Adjusted Time
Previous GSoC participation: This is my first time participation in gsoc .I got intrested for it by seeing the vast amount of development for open source hardware around the world .And i also want to become a part of it.
Skills: C,Python,ROS,OpenCV,Embeddded C,Electronics Prototying,circuit designing

Tools(proficient): Git, Linux, C

Experience: C, Python, OpenCV, Arduino

Hardware Skills: Raspberry Pi, ICs, Circuit Designing, Atmel chips, I2C, circuit designing, circuit debugging.

Reference Design For A GPIO-based Parallel Bi-Directional Bus

Project name: Reference Design For A GPIO-based Parallel Bi-Directional Bus

Student: Pranav Kumar
Mentors: Andrew Henderson, Kumar Abhishek, Hunyue Yau
Code: https://github.com/pranav083/pocket_beagle-work
Wiki: https://elinux.org/index.php?title=/BeagleBoard/GSoC/GPIO-parallel-bi-dir-bus

Important sites

for undersading gpio functionality : https://credentiality2.blogspot.com/2015/09/beaglebone-pru-gpio-example.html

Daily progress :

Date : 31 May 2019

  • First I made an introductory youtube video of my project
  • Purchased hardware related to this project like 8-bit logic analyzer ,logic level converter
  • Understand about the code structure on making kernel module Beagleboard and understanding the beaglelogic code docs
  • Read a little bit about kernel module development from this page .

Date : 1 June 2019

  • Till now made the circuit based on the GitHub link withh shift register circuit diagram.
  • Made the circuit for testing the board see the circuit drive link
  • Further work is to implement first user space program then PRU assembly code program.
  • completed studing kernel module developnment from site as suggested by my mentor and further looking into makefile

Date : 2 June 2019

I think i should also include blocker and goals in my further work

  • Till Now
    • Today I studied more about kernel module development and try to understand the code base starting from docs, then kernel folder and firmware folder
    • Try to complete the first week commitment of making the video for the different interfacing circuit but faces some problem due to less understanding assembly code in PRU
    • As i was working earlier in the User space so i was comfortable to make the program their but i want to submit the video and code with the assembly code
  • Blockers:
    • During navigating through the code of beaglelogic .asm file are less understandable for me .
    • Less understaning of the PRU assembly code to tackle that i watched again pru video from beagle bone site.
    • came across a github page during my search for barebone pru programming on pocket_beagle_samples
    • And downloaded the Sitara PRU but it was too big to be understable to me.

Date : 3 June 2019

  • Blocker
    • Building the program was not successful send my issue to my mentor
    • reading the datasheet stated above but very less success with it

Date : 4 June 2019

  • Till Now
    • while waiting for the response from the mentors started to study the assembly guide as found from different websites
    • completed the video training course on the pru programming and its different aspects through : https://training.ti.com/PRU-training-series
    • Setup ccs studio in a hope for running the pru through assembly codes
  • Blocker :
    • Still exploring the right way to program the pru in the beagle bone
    • Compile the code with out the main function and got bus error
    • Though found a way program as stated on most of the sites through the ti ccs studio but it is not the right way to continue

Date : 5 June 2019

  • Till Now
    • Got reply from the mentor and it worked after including main function and by compiling
    • starting every thing from new by re flashing the os image on the beaglebone black wireless
    • unable to install the library from the site : https://github.com/beagleboard/am335x_pru_package
    • Today is the meeting day and led a little discussion on which approach to use prussdrv or remoteproc.
  • Blocker
    • Still dont know how to get the system working through the assembly code and then come through the setup guide of complier form
    • Tried the method again of enabling pru from element14 site

As the project progress a little bit i thing of writing a blog on enabling pru in beagle board as the most of the sources are outdated

Date : 6 June 2019

  • Till Now
    • Changed the uEnv.txt for enabling remotproc pru system in beaglebone
    • Today finally get the pru assembly code working most of thanks to @hendersa guidance
    • Because till now from my side i had searched most of the resources that i can avail from web, beaglebone google group,etc.
    • But learn many things about its working and structure in the mean time .
  • Blocker
    • Most of the earlier problrm that i was facing is over for now now testing to run assembly code.

Date : 7 June 2019

Date : 8 June 2019

Date : 9 June 2019

  • Till Now
    • reading out the device tree and resource table generation
    • updated the done work on my github (through for this time it is very less :( .)
    • I was getting problem in navigating through vim .so,i Practice it from https://www.openvim.com (as i also dont know the commands)
  • Blocker
    • still not able to activate the gpio present in the p8 and p9 header through the assembly code
    • submitted my query to the mentors waiting for the reply

Date : 10 June 2019

  • Till Now
    • checking for the different techinique available for activating the gpio and as the resources available are a bit old so i have to find out resources from different place to make it work
    • digging deep into the datasheet in understanding the how the pins are getting activated through the pasm code
  • Blocker
    • same as above still no success on acquiring the pins

Date : 11 June 2019

  • Till Now
    • the mail received by the refernce to the derek molloy lecture in which he taught about the device tree understanding, compiling.
    • but it was for the kernel 3.8 and their is no folder named
/sys/devices/bone_capemgr.*/slots 

in the recent kernel version

  • Blocker
    • able to change the file but the effect are visible on the board

Date : 12-13 June 2019

  • Till Now
    • some how able to change and understand how the device tree work and the procedure to activate according to the previous kernel
    • But to eliminate any error of possibility i shifted to beaglebone black Rev C .As many site give their preference to change the device tree located in the folder /file
/boot/dtbs/4.14.71-ti-r80/am335x-boneblack.dts 

and changing the file gives no effect on the board .so, to eliminate any error of possibility i shifted to the Black Rev C .As given in the guide http://www.ofitselfso.com/BeagleNotes/AboutTheDeviceTree.pdf

    • Repeat the example that studied earlier in hope that pru pins start working
    • not much work done in this day other than this.

Date : 14 June 2019

  • Till Now
    • while searching on the internet came acrooss a code which seems to be working. Through it doesnot have documentation but it is understandable excepts for few code https://gist.github.com/jianingy/b144c9f70ae059a734fe5d49cb99cd30
    • for the first time i was able to activate the gpio no p8_13 by under stand the code. And the few thing that i learnt that
   lbco r0, CPRUCFG, 4, 4   // read SYSCFG
   clr  r0.t4               // clear SYSCFG[STANDBY_INIT]
   sbco r0, CPRUCFG, 4, 4   // enable OCP master port;
  1. first enable ocp master port mode a
  2. then make changes to device tree in according to that
  3. make the output enable for the pin
  • Blocker
    • still not able to understand the following line on the above link (line 43,53)
SET r30, r30, 15
CLR r30, r30, 15 

- as r30 register means it is an output register in which their is no listing of p8_13 port if i take the reference from the page : https://elinux.org/Ti_AM33XX_PRUSSv2#Beaglebone_PRU_connections_and_modes - and if go through the command it means that it is manipulating P8_15 as given in the table. But the P8_13 pin is activated not that pin p8_15 which should be activated according the reference information

  • Blocker
    • To test these code started to make my own set of activated pins in the device tree in the folder
/lib/firmware

Date : 15 June 2019

  • Till Now
    • making the device tree for the program but the problem is that pin available from the pru is scatted as pins are their but some give functionality of both input and output is less.
    • https://gist.github.com/pranav083/263142be5e0480025b2f7cd2a78ed631 here is the done work till now
    • Note: the above stated pins are now for demonstration purpose reference purpose .Just testing the derek molloy style of activating the ports of pru through the device tree.
    • But the problem that still remains that how the p8_15 will activated as previous day guide shows that p8_13 can be controlled with register r30 and bit no. 15.
  • Blocker
    • will raise the concern with my mentor about this and the project is going on slow speed i want to make the things a little bit fast.