Difference between revisions of "ECE597 Project Network based OGG player"

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(Hardware Update)
(Hardware)
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1 – 1kΩ Resistor
 
1 – 1kΩ Resistor
 
 
(Optional Voltage Dividers)
 
 
2 – 2kΩ Resistors
 
 
2 – 1.2kΩ Resistors
 
  
  
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In order to use the expansion of the C4 BeagleBoard, a .1” (one hundred thou) header, either male or female, needs to be soldered to the board. For this project the following pins will be used.  
+
In order to use the expansion header on the BeagleBoard, a .100'' header was soldered onto J3. The useful pins for this project are noted below.
  
  
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Making I2C2 work on the C4 BeagleBoard can be a bit tricky. First in order to make the I2C2 work on the BeagleBoard, the patch found [https://patchwork.kernel.org/patch/8322/ here], must be applied. Additional help can be found [http://groups.google.com/group/beagleboard/browse_thread/thread/a6c42ef56c6a2da2/1608e6c0f0207a8d?lnk=raot here].
+
Making I2C2 work on the BeagleBoard can be a bit tricky. Take a look at [[Interfacing_with_I2C_Devices#Beagleboard_I2C2_Enable]] for some tips.
The necessary changes to the U-Boot and Kernel can be found [http://elinux.org/BeagleBoardPinMux here] and [http://groups.google.com/group/beagleboard/msg/860de7e687539077 here].  The latest can be found [http://elinux.org/BeagleBoardPWM here]. Additional notes on I2C2, such as not enabling I2C2 unless something is actually connected, can be found [http://www.mail-archive.com/linux-omap@vger.kernel.org/msg02323.html here].
 
  
  
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The 2 capacitors should have a value of 1 uF. The 2 pull-up resistors will not be necessary due to the pull-up resistors in the logic level shifters (see below). The slave address of the I2C interface protocol is 0x7c. Pin 1 will be tied high, pins 2 and 3 are the SCL, SDA pins respectively, and will therefore go through the logic level shifter below. Pin 4 will be tied to ground. Pin 5 will be tied to the 3V signal of the voltage divider. Pin 6 will have a 1 uF capacitor tied to pin 5. Pin 7 will have a 1 uF capacitor tied to pin 8. Pin A will be tied to the 3V signal from the voltage divider. Pin k will be tied to ground.  
+
The 2 capacitors should have a value of 1 uF. The 2 pull-up resistors will not be necessary due to the pull-up resistors in the logic level shifters (see below). The slave address of the I2C interface protocol is 0x7c. Pin 1 will be tied high, pins 2 and 3 are the SCL, SDA pins respectively, and will therefore go through the logic level shifter below. Pin 4 will be tied to ground. Pin 5 will be tied to the 3.3V. Pin 6 will have a 1 uF capacitor tied to pin 5. Pin 7 will have a 1 uF capacitor tied to pin 8. Consult the datasheet for further information.
  
  
Line 94: Line 86:
  
  
The 1.8V supplied from the Beagle we be connected to the LV pin. The 5V supplied via pin 2 on the beagle will supply the HV pin after the voltage regulator to produce 3.3V.
+
The 1.8V supplied from the Beagle we be connected to the LV pin. The HV side will be powered with 3.3v from the voltage regulator
  
  
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[http://www.datasheetcatalog.org/datasheet/lineartechnology/1086ffs.pdf Datasheet]
 
[http://www.datasheetcatalog.org/datasheet/lineartechnology/1086ffs.pdf Datasheet]
 
 
'''Optional Voltage Divider'''
 
 
 
[http://www.makingthings.com/documentation/how-to/scale-a-5v-signal-to-3.3v How to Make a Voltage Divider]
 
 
 
For our purposes R1 will be set to 1.2k and R2 to 2k to ensure a 5V to 3V signal.
 
  
  
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Initially the level shifter and lcd display were tested on an arduino. During testing it was determined that the use of 2 voltage dividers would be beneficial, one for the i2c communication and one for the reset and backlight of the lcd. With this adjustment everything proved to be working. The circuit was then rewired to accommodate the 1.8V of the BeagleBoard.  
+
Initially the level shifter and lcd display were tested using an arduino as we already had working I2C code for the AVR.  Once the LCD initilization pattern and was functioning correctly the circuit was then rewired to accommodate the 1.8V of the BeagleBoard.  
  
  
When powering the BeagleBoard via USB there is an unreliable amount of power that can partially be stabilized via the serial cable, however greatly fluctuates as serial communication occurs; however, regardless the power was never greater that 3.9V. In order properly power the Beagle, a wall outlet needs to be used. While using the wall outlet stabilized the 5V supply of the BeagleBoard expansion pin 2, it did not stabilize the 3V supplied by the voltage divider during i2c communication; therefore a LT1086 CT 3.3 V regulator was used in conjunction with 2 10uF capacitors as specified by the datasheet.  
+
In the ECE597 lab kit, we were provided a USB->5V adapter for powering the beagle.  However there appears to be an issue with newer kernels drawing too much power to actually run the beagle off of USB.  The 5V pin on J3 was only outputting 3.9V. In order properly power the Beagle, a wall-wart needs to be used; which caused the 5V pin on J3 to be a steady 5.1v.
  
  
Additionally a 1uF capacitor was tied to the 1.8V supplied by the BeagleBoard expansion pin 1. With everything in place the code and circuit were tested. However it was observed that there was not a consistent read of data across the LCD, and additionally there would be Remote I/O errors on the Beagle. Therefore the i2c busses across the logic level shifter were observed, and the behavior was not quite as would be expected, as there was some data not always reaching high and low. Additionally the clock was not perfectly square. Therefore, for debugging purposes, a 1.8V square wave operating at the same 400 kHz as the BeagleBoard was attached to the SCL line and the input and output were observed via the oscilloscope. This revealed that the logic level shifters were taking a 1.8V square wave input and producing a non square output. However, by reducing the frequency the output could be made to appear squarer. Therefore the BeagleBoard kernel was adjusted such that the Beagle would operate at 50 kHz as opposed to the standard 400 kHz. This adjustment produced reliable results, which allowed the message to be adjusted and viewed via the LCD.  
+
Additionally a 1uF capacitor was tied to the 1.8V supplied by the BeagleBoard expansion pin 1 to ensure that in peak power demand, the pin level shifter would have a more reliable power supply. With everything in place the code and circuit were tested. However it was observed that there was not consistent data transmission between the beagle and the LCD.  The I2C bus would sometimes report Remote I/O errors. The the i2c level shifter was tested at the new voltage on an oscilloscope and using a 1.8v 400khz (same frequency as the i2c bus) square wave created by a function generator.  The behavior was not quite as would be expected. There bus was not reliably reaching 3.3V on the output of the level shifter, and the waves were not square. The output looked more like a charging capacitor. As speed is not a issue in our system, our solution was to reduce the clock frequency of the i2c bus from 400khz to 50khz. This adjustment produced reliable results, which allowed the correct and reliable communication with the LCD.  
  
  

Revision as of 17:29, 11 May 2010


This project is part of the ECE597 32-bit Embedded Linux class at Rose-Hulman Institute of Technology in Terre Haute, IN.


The goal of this project is to have the Beagleboard act as a network based mp3 player. The Beagle will be programmed using a custom, protocol for transferring files from a network based server (x86 pc) to a Beagle. Speakers will be attached to the Beagle, where the file will be played back. Possible extensions are a LCD for displaying id3 tag information, and buttons for user interaction (next track, previous track, etc.) on the GPIO interface.

Hardware

Parts

1 - C4 BeagleBoard

1 - .1” (100 thou) header

1 - LCD Display: NHD-C0216Ciz-FS-FBW-3V3

1 - Logic Level Shifter: BOB-08745

1 - 3.3 V Voltage Regulator: LT1086 CT

2 – 10uF Capacitors

3 – 1uF Capacitors

1 – 1kΩ Resistor


C4 Beagle Expansion


BeagleBoard datasheet (page 94):


In order to use the expansion header on the BeagleBoard, a .100 header was soldered onto J3. The useful pins for this project are noted below.


Pin 1 – 1.8V

Pin 2 – 5V

Pin 23 - SDA

Pin 24 - SCL

Pin 27 – GND


Making I2C2 work on the BeagleBoard can be a bit tricky. Take a look at Interfacing_with_I2C_Devices#Beagleboard_I2C2_Enable for some tips.


LCD Display


LCD Datasheet

Complete Display Datasheet

Purchase


Pin 1 – RST

Pin 2 – SCL

Pin 3 – SDA

Pin 4 – Vss

Pin 5 – Vdd

Pin 6 – Vout

Pin 7 – C1+

Pin 8 – C1-


The 2 capacitors should have a value of 1 uF. The 2 pull-up resistors will not be necessary due to the pull-up resistors in the logic level shifters (see below). The slave address of the I2C interface protocol is 0x7c. Pin 1 will be tied high, pins 2 and 3 are the SCL, SDA pins respectively, and will therefore go through the logic level shifter below. Pin 4 will be tied to ground. Pin 5 will be tied to the 3.3V. Pin 6 will have a 1 uF capacitor tied to pin 5. Pin 7 will have a 1 uF capacitor tied to pin 8. Consult the datasheet for further information.


Logic Level Shifter


Schematic


The 1.8V supplied from the Beagle we be connected to the LV pin. The HV side will be powered with 3.3v from the voltage regulator


3.3V Voltage Regulator


Datasheet


Testing Description


Initially the level shifter and lcd display were tested using an arduino as we already had working I2C code for the AVR. Once the LCD initilization pattern and was functioning correctly the circuit was then rewired to accommodate the 1.8V of the BeagleBoard.


In the ECE597 lab kit, we were provided a USB->5V adapter for powering the beagle. However there appears to be an issue with newer kernels drawing too much power to actually run the beagle off of USB. The 5V pin on J3 was only outputting 3.9V. In order properly power the Beagle, a wall-wart needs to be used; which caused the 5V pin on J3 to be a steady 5.1v.


Additionally a 1uF capacitor was tied to the 1.8V supplied by the BeagleBoard expansion pin 1 to ensure that in peak power demand, the pin level shifter would have a more reliable power supply. With everything in place the code and circuit were tested. However it was observed that there was not consistent data transmission between the beagle and the LCD. The I2C bus would sometimes report Remote I/O errors. The the i2c level shifter was tested at the new voltage on an oscilloscope and using a 1.8v 400khz (same frequency as the i2c bus) square wave created by a function generator. The behavior was not quite as would be expected. There bus was not reliably reaching 3.3V on the output of the level shifter, and the waves were not square. The output looked more like a charging capacitor. As speed is not a issue in our system, our solution was to reduce the clock frequency of the i2c bus from 400khz to 50khz. This adjustment produced reliable results, which allowed the correct and reliable communication with the LCD.


There are a few command line tests which can be performed in order to verify whether or not I2C is working properly, i2cdetectand output.

Links

BeagleBoard datasheet

Kernel Patch for I2C

Additional BeagleBoard I2C help

BeagleBoard U-Boot and Kernel Changes to Enable I2C2

Enabling I2C2

Latest Kernel Adjustments for I2C2

Additional Hints on I2C2

LCD Datasheet

Full LCD Datasheet

Buy the LCD

Logic Level Schematic

Purchase Level Shifter

Voltage Regulator Datasheet

Voltage Divider Info

i2cdtect Information

Results of i2cdetect