Difference between revisions of "Embedded Open Modular Architecture/EOMA-200"

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(Connector 3)
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|* 14 LCD Horizontal Synchronization
|* 14 LCD Horizontal Synchronization
|* 39 LCD Pixel data enable (TFT) output
|* 39 LCD Pixel data enable (TFT) output
=== Connector 4 ===
=== Connector 4 ===

Revision as of 05:45, 6 April 2013


  • Target uses: Mass-volume retail products. Examples: Small Desktop systems, Micro servers, Smart NAS Home Servers, Digital Signage, Industrial PCs, Education and R&D purposes.
  • Dimensions: 100mm x 65mm PCB in a 103 x 68 x 16mm case
  • Pinouts: 4 50-pin B2B connectors providing 200 mandatory pins
  • Extensibility: 30mm x 14mm front-facing panel space and 2nd 65mm x 14mm front-facing panel
  • Power provision: 5V @ 3.5A and 3.3V @ 3.5A (29 Watts total)


With many standards providing 200 or more pins, the differentiator which makes EOMA-200 worthwhile is that all other standards are bare PCB factory-only modules with optional sizes and optional functions. These factors combine to make other standards realistically installable only by experts or technical engineers with knowledge of ESD precautions and the full details of the available options.

The EOMA-200 modular standard is designed to be user-installable in mass-volume appliances. There are no options on the pinouts, thus making the purchasing decisions and the installation easy for the average person. Instead, options for extensibility are offered via two front-facing panels, in exactly the same way that standard ITX and ATX motherboards provide a standard front-facing area. One is of size 30mm x 14mm, and the other is of size 65mm x 14mm. The 65mm panel is sufficient to fit up to 4 Ethernet ports, or up to 8 USB2/3 ports, an HDMI connector, eSATA etc. The 30mm panel is intended but not limited to having an on-board MiniPCIe slot behind it, such that WIFI SMA connectors can be put into the 30mm panel.

Design Considerations and suitable CPUs

As the power provision is for up to 30 Watts, and the PCB size is 100 x 65mm, this standard is suitable for some low-power Intel CPUs, AMD's Fusion chipsets, VIA Nano CPUs and even RDC's IAD100PE offering [1], as well as the more modern ARM and MIPS SoCs. Designers should note however that provision of PCI Express is MANDATORY, ruling out many of the lower-cost SoCs and those that are targetted at tablets or phones.

Tegra 3

The NVidia Tegra 3 [2] is ideally suited to this form-factor, as it has PCI-Express. Although the Tegra 3 does not have Gigabit Ethernet it has a General-purpose memory controller that can take either a DM9000 which provides a 10/100 PHY in a single chip [3] or an AX88180 [hands.com/~lkcl/eoma/jz4760/AX88180_datasheet.pdf] in combination with an RGMII PHY. The other option for the Tegra 3 is to use a standard PCI-Express Bridge IC and standard PCI Express Gigabit Ethernet ICs.

AMD Fusion CPUs

AMD's Fusion CPUs are also ideally suited, such as the Embedded R-Series including the R-452L, R-260H alongside the A70M or A75 controller hubs [4]. The older G-Series would also be suitable all the way up to the T56N, in combination with the A50M or A55E controller hub [5] if the lack of USB3 and down-level negotiation to USB2 would be acceptable to end-users, or if a PCI-Express Bridge IC and a standard PCI Express USB3 IC is deployed on the Module's PCB.

Preliminary pinouts

Total pinouts summary

These pinouts are NOT OPTIONAL. However, within the majority of the interfaces is the ability to down-level negotiate or provide less than the full set of functionality. For example: if a particular SoC or CPU does not have USB3, then the USB3 pins can be left out and USB2 only provided. Additionally, if a particular low-cost SoC or CPU does not have a full set of 5 USB ports, a Hub Controller IC MUST be deployed on the Module PCB in order to comply with the standard. Likewise for PCIe: if a particular SoC or CPU does not have full 4-lane PCI Express capability then a 2x or even a 1x lane can be provided. Likewise also for the SD/MMC which can reduce down as far as 4 pins (in SPI mode); I2S as well can reduce down to 5 pins; Ethernet can down-level negotiate to 100mb/sec or even 10mb/sec.

HDMI: 12
USB3 (1): 6
USB3 (2): 6
USB3 (3): 6
USB2 (4): 2
USB-OTG (5): 3
I2C 0: 2
I2C 1: 2
I2S: 8
5V : 8
3.3V : 6
GND: 21
SDMMC 1: 12
SDMMC 2: 12
SPI: 4
PCIe4x: 20
Gig Eth: 8
GPIO: 24
UART 1: 2
UART 2: 4
Total: 200


  • PCI Express pinouts: [6]
  • SD/MMC description of 4-pin SPI mode: [7]
  • HDMI (Type A) pinouts: [8]
  • SD/MMC: [9]
  • SD/MMC 1-bit, 4-bit and 8-bit modes: [10]
  • eMMC: [11]
  • eMMC pinouts: CMD, CLK, RST, D0-D7. 1 extra pin reserved for Card Detect (if needed)

Connector 1

This block contains HDMI, Ethernet, I2S, I2C, SPI, 8-bit SD/MMC and 6 GPIO. HDMI also has 5 additional GND pins, bringing the total GND pins to 9 for this connector. It also has 3 power pins (2 5V and 1 3.3V)

1-12: HDMI
13: GND
14-21: Gig Eth
22: GND
23-34: SDMMC 0 (8-bit)
35-38: SPI
39-40: I2C 1
41: GND
42-43: 2 5V
44: GND
45-50: 6 GPIO


  • HDMI signals (Type A): Data2+, Data2-, Data1+, Data1-, Data0+, Data0-, Clock+, Clock-, CEC, SCL, SDA, HPD

Connector 2

This connector is primarily for PCI Express. 4 of the 6 GPIOs are dedicated to PCI Express management, and the I2C lane is also intended for connection to the PCI Express bus. Also provided is SD/MMC. There are 6 GND pins in total on this connector, and 4 3.3v power pins.

1-24: PCIe4x + 4 GND
25-26: I2C 0
27-38: SDMMC 1 (8-bit)
39: GND
40-43: 4 3.3V
44: GND


  • PCI-Express optional JTAG is for debugging of PCI-e cards, not for the provision of JTAG to debug the Host CPU. If JTAG is to be provided, it is recommended that either some of the GPIO pins be connected to the PCI Express lanes (and use bit-level emulation of JTAG on the Host CPU), or that an Embedded Controller (such as an STM32F) be dedicated to this (and other) purposes, or an alternative interface (such as USB or I2C) have a converter IC added which can be used.

Connector 3

This connector provides 24-pin RGB/TTL, SATA, 2 UARTs and 6 GPIO pins. It also has 4 GND pins and 2 5V power lines. UART 1 is a 2-pin RS232, whilst UART2 provides TX, RX as well as CTS and RTS.

1-28: RGB/TTL
29: GND
30-33: SATA
34: GND
35-38: UART 2
39-40: UART 1
41: GND
42-43: 2 5.0V
44: GND
45-50: 6 GPIO
Row 1 Row 2
* 1 LCD Pixel Data bit 0 (Red0) * 26 LCD Pixel Data bit 1 (Red1)
* 2 LCD Pixel Data bit 2 (Red2) * 27 LCD Pixel Data bit 3 (Red3)
* 3 LCD Pixel Data bit 4 (Red4) * 28 LCD Pixel Data bit 5 (Red5)
* 4 LCD Pixel Data bit 6 (Red6) * 29 LCD Pixel Data bit 7 (Red7)
* 5 LCD Pixel Data bit 8 (Green0) * 30 LCD Pixel Data bit 9 (Green1)
* 6 LCD Pixel Data bit 10 (Green2) * 31 LCD Pixel Data bit 11 (Green3)
* 7 LCD Pixel Data bit 12 (Green4) * 32 LCD Pixel Data bit 13 (Green5)
* 8 LCD Pixel Data bit 14 (Green6) * 33 LCD Pixel Data bit 15 (Green7)
* 9 LCD Pixel Data bit 16 (Blue0) * 34 LCD Pixel Data bit 17 (Blue1)
* 10 LCD Pixel Data bit 18 (Blue2) * 35 LCD Pixel Data bit 19 (Blue3)
* 11 LCD Pixel Data bit 20 (Blue4) * 36 LCD Pixel Data bit 21 (Blue5)
* 12 LCD Pixel Data bit 22 (Blue6) * 37 LCD Pixel Data bit 23 (Blue7)
* 13 LCD Pixel Clock * 38 LCD Vertical Synchronization
* 14 LCD Horizontal Synchronization * 39 LCD Pixel data enable (TFT) output

Connector 4

This connector is primarily for USB, although it also provides an 8-bit I2S and 6 GPIO pins. There are also 7 GND pins in total and 3 5V power lines.

1-7: 1 USB3 + 1 GND
8-14: 2 USB3 + 1 GND
15-21: 3 USB3 + 1 GND
22-24: 4 USB2 + 1 GND
25-28: 5 USB-OTG (Tx, Rx, ID) + 1 GND
29-36: I2S
37: GND
38-41: 4 5V
42: GND
45-50: 6 GPIO


  • USB3 pinouts [12]
  • I2S 8 pins: MCLK, BCLK, LRCK, DO0, DO1, DO2, DO3, DI

Interface Negotiation considerations

This section covers the down-level negotiation for the various interfaces.


If a SoC or CPU does not have 3 USB3 ports, then the provision of USB3 should be prioritised in numerical order (or the USB3 ports should be provided through the deployment of a PCI Express Bridge IC - or the use of a 2nd PCI Express interface if the CPU has one - and a standard PCI Express USB3 IC).

In other words, if the SoC only has one USB3 then this should be allocated to the 1st USB3 port on the module, and the remaining two USB3 ports should be USB2. If the SoC only has two USB3s then the first and second USB3 ports on the module should be USB, with the third being USB2.

Example EOMA-200 PC

The example below shows how a small Desktop PC can be created. This example has:

  • HDMI output
  • 1 USB3
  • 4 USB2
  • 2 Gigabit Ethernet
  • 1 eSATA
  • SD/MMC
  • Micro-SD
  • Micro-USB
  • Mini PCIe with a combined Bluetooth 4 and 802.11N 300mb/sec WIFI card
  • Standard Audio connectors
  • DC Power input jack