Difference between revisions of "Ingenic JZ4780"
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|- | |- | ||
| CPU | | CPU | ||
− | | Dual 1.2GHz [ | + | | Dual 1.2GHz [http://www.ingenic.cn/en/?xburst.html Xburst], MIPS32r2 compatible CPU, little endian |
|- | |- | ||
| Caches | | Caches | ||
| 32kI + 32kD per core, 512K shared L2 | | 32kI + 32kD per core, 512K shared L2 | ||
+ | |- | ||
+ | | DDR controller | ||
+ | | DDR2, DDR3, DDR3L, DDR3U, LPDDR, LPDDR2 | ||
|- | |- | ||
| GPU | | GPU | ||
− | | SGX540 | + | | SGX540 (3D) X2D (2D) |
|- | |- | ||
| Video | | Video | ||
− | | Hardware video decode upto 1080p60 | + | | Hardware video decode upto 1080p60 (VPU) |
+ | |- | ||
+ | | External interrupt controller | ||
+ | | 64 independent interrupt sources | ||
+ | |- | ||
+ | | DMA | ||
+ | | 32 independent DMA channels | ||
+ | |- | ||
+ | | NAND Memory Controller | ||
+ | | Up to 6 chips | ||
+ | |- | ||
+ | | BCH controller | ||
+ | | Up to 64bit ECC encoding and decoding | ||
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* [http://mipscreator.imgtec.com/CI20/hardware/soc/JZ4780_ds.pdf Data sheet] from the [[CI20]] file archive | * [http://mipscreator.imgtec.com/CI20/hardware/soc/JZ4780_ds.pdf Data sheet] from the [[CI20]] file archive | ||
− | * [http://mipscreator.imgtec.com/CI20/hardware/soc/JZ4780_PM.pdf Programmers | + | * [http://mipscreator.imgtec.com/CI20/hardware/soc/JZ4780_PM.pdf Programmers Manual] from the [[CI20]] file archive |
+ | |||
+ | * [https://groups.google.com/forum/#!topic/mips-creator-ci20/hh4NLXzFEwk Xburst instruction cycles] |
Latest revision as of 13:56, 29 May 2016
The Ingenic JZ4780 is an SoC from Ingenic targetting mobile devices.
Technical Specifications
Feature | Details |
---|---|
CPU | Dual 1.2GHz Xburst, MIPS32r2 compatible CPU, little endian |
Caches | 32kI + 32kD per core, 512K shared L2 |
DDR controller | DDR2, DDR3, DDR3L, DDR3U, LPDDR, LPDDR2 |
GPU | SGX540 (3D) X2D (2D) |
Video | Hardware video decode upto 1080p60 (VPU) |
External interrupt controller | 64 independent interrupt sources |
DMA | 32 independent DMA channels |
NAND Memory Controller | Up to 6 chips |
BCH controller | Up to 64bit ECC encoding and decoding |
External Links
- Data sheet from the Ingenic ftp site
- Data sheet from the CI20 file archive
- Programmers Manual from the CI20 file archive