Difference between revisions of "Minnowboard:Expansion Interfaces"
Line 8: | Line 8: | ||
! scope="col"| Pin Number | ! scope="col"| Pin Number | ||
! scope="col"| Function | ! scope="col"| Function | ||
− | |- | + | |- style="background:#b783a7" |
| PCIe1_CLK_REQ | | PCIe1_CLK_REQ | ||
− | | 1 | + | | 1 || style="background:#b783a7" | 2 || style="background:#b783a7" | PCIe2_CLK_REQ |
− | | 2 | ||
− | | PCIe2_CLK_REQ | ||
|- style="background:yellow" | |- style="background:yellow" | ||
| PWROK | | PWROK | ||
Line 19: | Line 17: | ||
| GND | | GND | ||
| 5 || style="background:#8f99b1" | 6 || style="background:#8f99b1" | HDA_RST_N | | 5 || style="background:#8f99b1" | 6 || style="background:#8f99b1" | HDA_RST_N | ||
− | |- | + | |- style="background:#b783a7" |
| PCIe_REFCLK_N | | PCIe_REFCLK_N | ||
| 7 || style="background:#8f99b1" | 8 || style="background:#8f99b1" | HDA_SYNC | | 7 || style="background:#8f99b1" | 8 || style="background:#8f99b1" | HDA_SYNC | ||
− | |- | + | |- style="background:#b783a7" |
| PCIe_REFCLK_P | | PCIe_REFCLK_P | ||
| 9 || style="background:#8f99b1" | 10 || style="background:#8f99b1" | HDA_SDO | | 9 || style="background:#8f99b1" | 10 || style="background:#8f99b1" | HDA_SDO | ||
Line 28: | Line 26: | ||
| GND | | GND | ||
| 11 || style="background:#8f99b1" | 12 || style="background:#8f99b1" | HDA_SDI1 | | 11 || style="background:#8f99b1" | 12 || style="background:#8f99b1" | HDA_SDI1 | ||
− | |- | + | |- style="background:#b783a7" |
| PCIe1_RX_N | | PCIe1_RX_N | ||
| 13 || style="background:green" | 14 || style="background:green" | GND | | 13 || style="background:green" | 14 || style="background:green" | GND | ||
− | |- | + | |- style="background:#b783a7" |
| PCIe1_RX_P | | PCIe1_RX_P | ||
− | | 15 | + | | 15 || style="background:#b783a7" | 16 || style="background:#b783a7" | PCIe2_RX_N |
− | | 16 | ||
− | | PCIe2_RX_N | ||
|- style="background:green" | |- style="background:green" | ||
| GND | | GND | ||
− | | 17 | + | | 17 || style="background:#b783a7" | 18 || style="background:#b783a7" | PCIe2_RX_P |
− | | 18 | + | |- style="background:#b783a7" |
− | | PCIe2_RX_P | ||
− | |- | ||
| PCIe1_TX_N | | PCIe1_TX_N | ||
| 19 | | 19 | ||
| 20 | | 20 | ||
| GND | | GND | ||
− | |- | + | |- style="background:#b783a7" |
| PCIe1_TX_P | | PCIe1_TX_P | ||
− | | 21 | + | | 21 || style="background:#b783a7" | 22 || style="background:#b783a7" | PCIe2_TX_N |
− | | 22 | ||
− | | PCIe2_TX_N | ||
|- style="background:green" | |- style="background:green" | ||
| GND | | GND | ||
− | | 23 | + | | 23 || style="background:#b783a7" | 24 || style="background:#b783a7" | PCIe2_TX_P |
− | | 24 | ||
− | | PCIe2_TX_P | ||
|- style="background:#00ff3c" | |- style="background:#00ff3c" | ||
| SMB_CLK | | SMB_CLK |
Revision as of 17:38, 13 May 2013
The table below describes the various different expansion interfaces on the Minnowboard:
Function | Pin Number | Pin Number | Function |
---|---|---|---|
PCIe1_CLK_REQ | 1 | 2 | PCIe2_CLK_REQ |
PWROK | 3 | 4 | HDA_CLK |
GND | 5 | 6 | HDA_RST_N |
PCIe_REFCLK_N | 7 | 8 | HDA_SYNC |
PCIe_REFCLK_P | 9 | 10 | HDA_SDO |
GND | 11 | 12 | HDA_SDI1 |
PCIe1_RX_N | 13 | 14 | GND |
PCIe1_RX_P | 15 | 16 | PCIe2_RX_N |
GND | 17 | 18 | PCIe2_RX_P |
PCIe1_TX_N | 19 | 20 | GND |
PCIe1_TX_P | 21 | 22 | PCIe2_TX_N |
GND | 23 | 24 | PCIe2_TX_P |
SMB_CLK | 25 | 26 | GND |
SMB_DAT | 27 | 28 | CAN_TX |
GND | 29 | 30 | CAN_RX |
SATA1_RX_N | 31 | 32 | GND |
SATA1_RX_P | 33 | 34 | LVDS_DATA_N_0 |
GND | 35 | 36 | LVDS_DATA_P_0 |
SATA1_TX_N | 37 | 38 | GND |
SATA1_TX_P | 39 | 40 | LVDS_DATA_N_1 |
GND | 41 | 42 | LVDS_DATA_P_1 |
USB_HOST_DM4 | 43 | 44 | GND |
USB_HOST_DP4 | 45 | 46 | LVDS_DATA_N_2 |
VBUS4 | 47 | 48 | LVDS_DATA_P_2 |
GND | 49 | 50 | GND |
WAKE_EXP_N | 51 | 52 | LVDS_CLK_N |
UART1_TX | 53 | 54 | LVDS_CLK_P |
UART1_RX | 55 | 56 | GND |
UART2_TX | 57 | 58 | LVDS_DATA_N_3 |
UART2_RX | 59 | 60 | LVDS_DATA_P_3 |
I2C0_SCL | 61 | 62 | GND |
I2C0_SDA | 63 | 64 | E6XX_GPIO_SUS0 |
GND | 65 | 66 | E6XX_GPIO_SUS1 |
EG20T_SPI_CLK | 67 | 68 | E6XX_GPIO_SUS3 |
EG20T_SPI_nCS | 69 | 70 | E6XX_GPIO_SUS4 |
EG20T_SPI_MOSI | 71 | 72 | E6XX_GPIO_SUS2 |
EG20T_SPI_MISO | 73 | 74 | LVDS_DETECT |
GPIO0 | 75 | 76 | SDIO1_CD_N |
GPIO1 | 77 | 78 | SDIO1_WP |
GPIO2 | 79 | 80 | SDIO1_CLK_R |
GPIO3 | 81 | 82 | SDIO1_CMD_R |
GPIO4 | 83 | 84 | SDIO1_DATA0_R |
GPIO5 | 85 | 86 | SDIO1_DATA1_R |
GPIO6 | 87 | 88 | SDIO1_DATA2_R |
GPIO7 | 89 | 90 | SDIO1_DATA3_R |
GPIO_PROG_VOLTAGE | 91 | 92 | DC_IN_5V |
DC_IN_5V | 93 | 94 | DC_IN_5V |
DC_IN_5V | 95 | 96 | DC_IN_5V |
DC_IN_5V | 97 | 98 | DC_IN_5V |
DC_IN_5V | 99 | 100 | DC_IN_5V |