Difference between revisions of "Qualcomm SMEM Items"
(→478: SMEM_GLINK_NATIVE_XPRT_DESCRIPTOR) |
(→427 - 434: SMEM_SMP2P_APPS_BASE) |
||
Line 120: | Line 120: | ||
=== 425: SMEM_SSR_REASON_VCODEC0 === | === 425: SMEM_SSR_REASON_VCODEC0 === | ||
=== 427 - 434: SMEM_SMP2P_APPS_BASE === | === 427 - 434: SMEM_SMP2P_APPS_BASE === | ||
+ | {| class="wikitable" | ||
+ | !colspan="3"|SMP2P Items | ||
+ | |- | ||
+ | |428 | ||
+ | |Apps | ||
+ | |Modem | ||
+ | |- | ||
+ | |429 | ||
+ | |Apps | ||
+ | |Audio | ||
+ | |- | ||
+ | |430 | ||
+ | |Apps | ||
+ | |Sensor | ||
+ | |- | ||
+ | |435 | ||
+ | |Modem | ||
+ | |Apps | ||
+ | |- | ||
+ | |443 | ||
+ | |Audio | ||
+ | |Apps | ||
+ | |- | ||
+ | |481 | ||
+ | |Sensor | ||
+ | |Apps | ||
+ | |} | ||
+ | |||
Each SMEM item consists of a header, Followed by a list of 16 entries of: | Each SMEM item consists of a header, Followed by a list of 16 entries of: | ||
struct smp2p_header { | struct smp2p_header { |
Revision as of 15:42, 15 December 2016
This is a compilation of the SMEM items defined in the codeaurora kernel.
Contents
- 1 0: SMEM_PROC_COMM
- 2 1: SMEM_HEAP_INFO
- 3 2: SMEM_ALLOCATION_TABLE
- 4 3: SMEM_VERSION_INFO
- 5 4: SMEM_HW_RESET_DETECT
- 6 5: SMEM_AARM_WARM_BOOT
- 7 6: SMEM_DIAG_ERR_MESSAGE
- 8 7: SMEM_SPINLOCK_ARRAY
- 9 8: SMEM_MEMORY_BARRIER_LOCATION
- 10 8: SMEM_FIXED_ITEM_LAST
- 11 9: SMEM_AARM_PARTITION_TABLE
- 12 10: SMEM_AARM_BAD_BLOCK_TABLE
- 13 11: SMEM_RESERVE_BAD_BLOCKS
- 14 12: SMEM_WM_UUID
- 15 13: SMEM_CHANNEL_ALLOC_TBL
- 16 14: SMEM_SMD_BASE_ID
- 17 78: SMEM_SMEM_LOG_IDX
- 18 79: SMEM_SMEM_LOG_EVENTS
- 19 80: SMEM_SMEM_STATIC_LOG_IDX
- 20 81: SMEM_SMEM_STATIC_LOG_EVENTS
- 21 82: SMEM_SMEM_SLOW_CLOCK_SYNC
- 22 83: SMEM_SMEM_SLOW_CLOCK_VALUE
- 23 84: SMEM_BIO_LED_BUF
- 24 85: SMEM_SMSM_SHARED_STATE
- 25 86: SMEM_SMSM_INT_INFO
- 26 87: SMEM_SMSM_SLEEP_DELAY
- 27 88: SMEM_SMSM_LIMIT_SLEEP
- 28 89: SMEM_SLEEP_POWER_COLLAPSE_DISABLED
- 29 90: SMEM_KEYPAD_KEYS_PRESSED
- 30 91: SMEM_KEYPAD_STATE_UPDATED
- 31 92: SMEM_KEYPAD_STATE_IDX
- 32 93: SMEM_GPIO_INT
- 33 94: SMEM_MDDI_LCD_IDX
- 34 95: SMEM_MDDI_HOST_DRIVER_STATE
- 35 96: SMEM_MDDI_LCD_DISP_STATE
- 36 97: SMEM_LCD_CUR_PANEL
- 37 98: SMEM_MARM_BOOT_SEGMENT_INFO
- 38 99: SMEM_AARM_BOOT_SEGMENT_INFO
- 39 100: SMEM_SLEEP_STATIC
- 40 101: SMEM_SCORPION_FREQUENCY
- 41 102: SMEM_SMD_PROFILES
- 42 103: SMEM_TSSC_BUSY
- 43 104: SMEM_HS_SUSPEND_FILTER_INFO
- 44 105: SMEM_BATT_INFO
- 45 106: SMEM_APPS_BOOT_MODE
- 46 107: SMEM_VERSION_FIRST
- 47 107: SMEM_VERSION_SMD
- 48 131: SMEM_VERSION_LAST
- 49 132: SMEM_OSS_RRCASN1_BUF1
- 50 133: SMEM_OSS_RRCASN1_BUF2
- 51 134: SMEM_ID_VENDOR0
- 52 135: SMEM_ID_VENDOR1
- 53 136: SMEM_ID_VENDOR2
- 54 137: SMEM_HW_SW_BUILD_ID
- 55 138: SMEM_SMD_BASE_ID_2
- 56 202: SMEM_SMD_FIFO_BASE_ID_2
- 57 266: SMEM_CHANNEL_ALLOC_TBL_2
- 58 330: SMEM_I2C_MUTEX
- 59 331: SMEM_SCLK_CONVERSION
- 60 332: SMEM_SMD_SMSM_INTR_MUX
- 61 333: SMEM_SMSM_CPU_INTR_MASK
- 62 334: SMEM_APPS_DEM_SLAVE_DATA
- 63 335: SMEM_QDSP6_DEM_SLAVE_DATA
- 64 336: SMEM_CLKREGIM_BSP
- 65 337: SMEM_CLKREGIM_SOURCES
- 66 338: SMEM_SMD_FIFO_BASE_ID
- 67 402: SMEM_USABLE_RAM_PARTITION_TABLE
- 68 403: SMEM_POWER_ON_STATUS_INFO
- 69 404: SMEM_DAL_AREA
- 70 405: SMEM_SMEM_LOG_POWER_IDX
- 71 406: SMEM_SMEM_LOG_POWER_WRAP
- 72 407: SMEM_SMEM_LOG_POWER_EVENTS
- 73 408: SMEM_ERR_CRASH_LOG
- 74 409: SMEM_ERR_F3_TRACE_LOG
- 75 410: SMEM_SMD_BRIDGE_ALLOC_TABLE
- 76 411: SMEM_SMDLITE_TABLE
- 77 412: SMEM_SD_IMG_UPGRADE_STATUS
- 78 413: SMEM_SEFS_INFO
- 79 414: SMEM_RESET_LOG
- 80 415: SMEM_RESET_LOG_SYMBOLS
- 81 416: SMEM_MODEM_SW_BUILD_ID
- 82 417: SMEM_SMEM_LOG_MPROC_WRAP
- 83 418: SMEM_BOOT_INFO_FOR_APPS
- 84 419: SMEM_SMSM_SIZE_INFO
- 85 420: SMEM_SMD_LOOPBACK_REGISTER
- 86 421: SMEM_SSR_REASON_MSS0
- 87 422: SMEM_SSR_REASON_WCNSS0
- 88 423: SMEM_SSR_REASON_LPASS0
- 89 424: SMEM_SSR_REASON_DSPS0
- 90 425: SMEM_SSR_REASON_VCODEC0
- 91 427 - 434: SMEM_SMP2P_APPS_BASE
- 92 435: SMEM_SMP2P_MODEM_BASE
- 93 443: SMEM_SMP2P_AUDIO_BASE
- 94 451: SMEM_SMP2P_WIRLESS_BASE
- 95 459: SMEM_SMP2P_POWER_BASE
- 96 467: SMEM_FLASH_DEVICE_INFO
- 97 468: SMEM_BAM_PIPE_MEMORY
- 98 469: SMEM_IMAGE_VERSION_TABLE
- 99 470: SMEM_LC_DEBUGGER
- 100 471: SMEM_FLASH_NAND_DEV_INFO
- 101 472: SMEM_A2_BAM_DESCRIPTOR_FIFO
- 102 473: SMEM_CPR_CONFIG
- 103 474: SMEM_CLOCK_INFO
- 104 475: SMEM_IPC_FIFO
- 105 476: SMEM_RF_EEPROM_DATA
- 106 477: SMEM_COEX_MDM_WCN
- 107 478: SMEM_GLINK_NATIVE_XPRT_DESCRIPTOR
- 108 479, 480: SMEM_GLINK_NATIVE_XPRT_FIFO
- 109 481: SMEM_SMP2P_SENSOR_BASE
- 110 489: SMEM_SMP2P_TZ_BASE
- 111 497: SMEM_IPA_FILTER_TABLE
- 112 505: SMEM_NUM_ITEMS
0: SMEM_PROC_COMM
1: SMEM_HEAP_INFO
2: SMEM_ALLOCATION_TABLE
3: SMEM_VERSION_INFO
Contains an array of 32 little endian integers, defining the version of things.
Known entries | |
---|---|
7 | Modem/Master SBL |
4: SMEM_HW_RESET_DETECT
5: SMEM_AARM_WARM_BOOT
6: SMEM_DIAG_ERR_MESSAGE
7: SMEM_SPINLOCK_ARRAY
An array of 8 32-bit lock entries, for a total of 32 bytes in size.
MSM7x30
On MSM7x30 Dekker's algorithm is used. Each lock is described by the following structure:
struct dek_spinlock { u8 self_lock; u8 other_lock; u8 next_yield; u8 pad; };
With the application CPU being "self_lock" and represented as "next_yield" 0.
MSM8x60
On MSM8x60 the spinlock mechanism is replaced by ldrex/strexeq.
The application CPU is represented by the little endian id 1, with 0 representing the lock being free.
8: SMEM_MEMORY_BARRIER_LOCATION
8: SMEM_FIXED_ITEM_LAST
9: SMEM_AARM_PARTITION_TABLE
10: SMEM_AARM_BAD_BLOCK_TABLE
11: SMEM_RESERVE_BAD_BLOCKS
12: SMEM_WM_UUID
13: SMEM_CHANNEL_ALLOC_TBL
14: SMEM_SMD_BASE_ID
78: SMEM_SMEM_LOG_IDX
79: SMEM_SMEM_LOG_EVENTS
80: SMEM_SMEM_STATIC_LOG_IDX
81: SMEM_SMEM_STATIC_LOG_EVENTS
82: SMEM_SMEM_SLOW_CLOCK_SYNC
83: SMEM_SMEM_SLOW_CLOCK_VALUE
84: SMEM_BIO_LED_BUF
85: SMEM_SMSM_SHARED_STATE
86: SMEM_SMSM_INT_INFO
87: SMEM_SMSM_SLEEP_DELAY
88: SMEM_SMSM_LIMIT_SLEEP
89: SMEM_SLEEP_POWER_COLLAPSE_DISABLED
90: SMEM_KEYPAD_KEYS_PRESSED
91: SMEM_KEYPAD_STATE_UPDATED
92: SMEM_KEYPAD_STATE_IDX
93: SMEM_GPIO_INT
94: SMEM_MDDI_LCD_IDX
95: SMEM_MDDI_HOST_DRIVER_STATE
96: SMEM_MDDI_LCD_DISP_STATE
97: SMEM_LCD_CUR_PANEL
98: SMEM_MARM_BOOT_SEGMENT_INFO
99: SMEM_AARM_BOOT_SEGMENT_INFO
100: SMEM_SLEEP_STATIC
101: SMEM_SCORPION_FREQUENCY
102: SMEM_SMD_PROFILES
103: SMEM_TSSC_BUSY
104: SMEM_HS_SUSPEND_FILTER_INFO
105: SMEM_BATT_INFO
106: SMEM_APPS_BOOT_MODE
107: SMEM_VERSION_FIRST
107: SMEM_VERSION_SMD
131: SMEM_VERSION_LAST
132: SMEM_OSS_RRCASN1_BUF1
133: SMEM_OSS_RRCASN1_BUF2
134: SMEM_ID_VENDOR0
135: SMEM_ID_VENDOR1
136: SMEM_ID_VENDOR2
137: SMEM_HW_SW_BUILD_ID
138: SMEM_SMD_BASE_ID_2
202: SMEM_SMD_FIFO_BASE_ID_2
266: SMEM_CHANNEL_ALLOC_TBL_2
330: SMEM_I2C_MUTEX
331: SMEM_SCLK_CONVERSION
332: SMEM_SMD_SMSM_INTR_MUX
333: SMEM_SMSM_CPU_INTR_MASK
334: SMEM_APPS_DEM_SLAVE_DATA
335: SMEM_QDSP6_DEM_SLAVE_DATA
336: SMEM_CLKREGIM_BSP
337: SMEM_CLKREGIM_SOURCES
338: SMEM_SMD_FIFO_BASE_ID
402: SMEM_USABLE_RAM_PARTITION_TABLE
403: SMEM_POWER_ON_STATUS_INFO
404: SMEM_DAL_AREA
405: SMEM_SMEM_LOG_POWER_IDX
406: SMEM_SMEM_LOG_POWER_WRAP
407: SMEM_SMEM_LOG_POWER_EVENTS
408: SMEM_ERR_CRASH_LOG
409: SMEM_ERR_F3_TRACE_LOG
410: SMEM_SMD_BRIDGE_ALLOC_TABLE
411: SMEM_SMDLITE_TABLE
412: SMEM_SD_IMG_UPGRADE_STATUS
413: SMEM_SEFS_INFO
414: SMEM_RESET_LOG
415: SMEM_RESET_LOG_SYMBOLS
416: SMEM_MODEM_SW_BUILD_ID
417: SMEM_SMEM_LOG_MPROC_WRAP
418: SMEM_BOOT_INFO_FOR_APPS
419: SMEM_SMSM_SIZE_INFO
420: SMEM_SMD_LOOPBACK_REGISTER
421: SMEM_SSR_REASON_MSS0
422: SMEM_SSR_REASON_WCNSS0
423: SMEM_SSR_REASON_LPASS0
424: SMEM_SSR_REASON_DSPS0
425: SMEM_SSR_REASON_VCODEC0
427 - 434: SMEM_SMP2P_APPS_BASE
SMP2P Items | ||
---|---|---|
428 | Apps | Modem |
429 | Apps | Audio |
430 | Apps | Sensor |
435 | Modem | Apps |
443 | Audio | Apps |
481 | Sensor | Apps |
Each SMEM item consists of a header, Followed by a list of 16 entries of:
struct smp2p_header { u8 magic[4]; u8 version; u8 features[3]; __le16 local_pid; __le16 remote_pid; __le16 count; __le16 valid; __le32 flags; };
Magic
Must be "$SMP"
Version
Currently 1
Features
A set of bits, each representing supported features:
- Subsystem Restart Ack
Local PID
ID of the local processor for this item.
Remote PID
ID of the remote processor for this item.
Count
Number of allocated entries following the header.
Valid
Number of entries currently in use
Flags
Following the SMP2P header is a list of count entries of:
struct smp2p_entry { u8 name[16]; __le32 value; };
Name
Identifier for this entry
Value
The 32 bit value for this SMP2P entry. Normally only used to signal single-bit events.
435: SMEM_SMP2P_MODEM_BASE
443: SMEM_SMP2P_AUDIO_BASE
451: SMEM_SMP2P_WIRLESS_BASE
459: SMEM_SMP2P_POWER_BASE
467: SMEM_FLASH_DEVICE_INFO
468: SMEM_BAM_PIPE_MEMORY
469: SMEM_IMAGE_VERSION_TABLE
The image version table is an array of entries each describing individual components in the system.
The entries are described by the struct:
struct image_version { char name[75]; char variant[20] char pad; char oem[32]; };
Known entries | |
---|---|
0 | Boot |
1 | TZ |
3 | RPM |
10 | Application subsystem |
11 | Modem subsystem |
12 | ADSP subsystem |
13 | Communication subsystem |
14 | Video subsystem |
470: SMEM_LC_DEBUGGER
471: SMEM_FLASH_NAND_DEV_INFO
472: SMEM_A2_BAM_DESCRIPTOR_FIFO
473: SMEM_CPR_CONFIG
474: SMEM_CLOCK_INFO
475: SMEM_IPC_FIFO
476: SMEM_RF_EEPROM_DATA
477: SMEM_COEX_MDM_WCN
478: SMEM_GLINK_NATIVE_XPRT_DESCRIPTOR
The GLINK SMEM XPRT descriptor contains the read and write index for the TX and RX FIFOs.
struct glink_desc { __le32 tx_read; __le32 tx_write; __le32 rx_read; __le32 rw_write; };
TX Read/write
Indices into the TX FIFO (item #479), the producer puts data in the FIFO and updates the write index', it then signals the remote processor which reads the data and updates the read index.
RX Read/write
Analogous to the TX, but roles are switched.
479, 480: SMEM_GLINK_NATIVE_XPRT_FIFO
Ring buffer for GLINK TX and RX data, respectively (as seen from APPS).
Multiple remote targets can be supported based on SMEM partitioning.
481: SMEM_SMP2P_SENSOR_BASE
489: SMEM_SMP2P_TZ_BASE
497: SMEM_IPA_FILTER_TABLE
505: SMEM_NUM_ITEMS
Current number of defined SMEM items