Difference between revisions of "R-Car/Boards/H3SK"

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(H3SK has several kinds of boards)
(H3SK with SINGLE RANKED DDR)
 
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 +
{{Template:R-Car-Gen3-Navbox}}
 
{{TOC right}}
 
{{TOC right}}
 +
[[Category:R-Car]]
 +
[[Category:R-Car Gen3]]
  
[[R-Car/Boards/Yocto-Gen3|Yocto-Gen3]]
 
 
== Introduction ==
 
== Introduction ==
  
This is the Wiki for the Renesas R-Car Starter Kit Premier board (RTP0RC7795SKB00010S).
+
This is the Wiki for the Renesas R-Car Starter Kit Premier board.
 
Refer to the [[R-Car]] page for information about Renesas' R-Car SoC family.
 
Refer to the [[R-Car]] page for information about Renesas' R-Car SoC family.
 +
 +
== Topic ==
 +
{{Template:R-Car-Gen3-SK-Topic}}
 +
 +
<!--
 +
=== Where to buy===
 +
Marutsu-elec : Japan only <br>
 +
Shimafuji electric incorporated <span style="color:#ff0000;">[NEW]</span>  : World Wide
 +
-->
  
 
== Hardware ==
 
== Hardware ==
Line 15: Line 26:
 
<li> H3 WS2.0 silicon mounted board
 
<li> H3 WS2.0 silicon mounted board
 
<pre>
 
<pre>
Type name: RTP0RC77951SKBX010SA00[S/N 2001~3000] (LPDDR4: DDR 4GiB(Samsung 1GB x4), eMMC 8GB)
+
Type name: RTP0RC77951SKBX010SA00[S/N 2001~3000] (LPDDR4: DDR 4GiB(Samsung 1GB x4), eMMC 8GB(Samsung))
Type name: RTP0RC77951SKBX010SA00[S/N 3001~3300] (LPDDR4: DDR 4GiB(Samsung 1GB x4), eMMC 64GB)
+
Type name: RTP0RC77951SKBX010SA00[S/N 3001~3300] (LPDDR4: DDR 4GiB(Samsung 1GB x4), eMMC 64GB(SanDisk))
Type name: RTP0RC77951SKBX010SA01 (LPDDR4: DDR 4GiB(Micron 1GB x4), eMMC 8GB)
+
Type name: RTP0RC77951SKBX010SA01[S/N 4001-4500] (LPDDR4: DDR 4GiB(Micron 1GB x4), eMMC 8GB(Micron))
Type name: RTP0RC77951SKBX010SA03 (LPDDR4: DDR 8GiB(Samsung 2GB x4), eMMC 32GB)
+
Type name: RTP0RC77951SKBX010SA03[S/N 20001-20200] (LPDDR4: DDR 8GiB(Samsung 2GB x4) Dual Rank, eMMC 32GB(Samsung))
 +
Type name: RTP0RC77951SKBX010SA03[S/N 20201-20400] (LPDDR4: DDR 8GiB(Samsung 2GB x4) Dual Rank, eMMC 32GB(SanDisk))
 
</pre>
 
</pre>
 +
 +
<li> H3 WS3.0 silicon mounted board
 +
<pre>
 +
Type name: RTP0RC77951SKBX010SA03[S/N 25051-25668, 25769-25838 ] (LPDDR4: DDR 8GiB(Samsung 2GB x4) Dual Rank, eMMC 128GB(Samsung))
 +
Type name: RTP0RC77951SKBX010SA03[S/N 25669-25768, 25839-25999 ] (LPDDR4: DDR 8GiB(Samsung 2GB x4) Single Rank, eMMC 128GB(Samsung))
 +
</pre>
 +
 +
{| class="wikitable"
 +
|+ H3 SK variation
 +
|-
 +
! Type Name !! Serial Number !! SoC version !! DDR !! eMMC !! Protection circuit threshold
 +
|-
 +
| RTP0RC77951SKBX010SA00 || 2001-3000 || 2.0 || 4GiB(Samsung 1GB x4) || 8GB(Samsung) || none
 +
|-
 +
| RTP0RC77951SKBX010SA00 || 3001-3300 || 2.0 || 4GiB(Samsung 1GB x4) || 64GB(SanDisk) || 5.15 volt
 +
|-
 +
| RTP0RC77951SKBX010SA01 || 4001-4500 || 2.0 || 4GiB(Micron 1GB x4) || 8GB(Micron) || none
 +
|-
 +
| RTP0RC77951SKBX010SA03 || 20001-20200 || 2.0 || 8GiB(Samsung 2GB x4), Dual Rank || 32GB(Samsung) || none
 +
|-
 +
| RTP0RC77951SKBX010SA03 || 20201-20400 || 2.0 || 8GiB(Samsung 2GB x4), Dual Rank || 32GB(SanDisk) || 6.0 volt
 +
|-
 +
| RTP0RC77951SKBX010SA03 || 25051-25668, 25769-25838|| 3.0 || 8GiB(Samsung 2GB x4), Dual Rank || 128GB(Samsung) || 6.0 volt
 +
|-
 +
| RTP0RC77951SKBX010SA03 (*) || <span style="color:#ff0000;">25669-25768, 25839-25999</span>|| 3.0 || 8GiB(Samsung 2GB x4), <span style="color:#ff0000;">Single</span> Rank || 128GB(Samsung) || 6.0 volt
 +
|}
 +
(*) Note: See [[R-Car/Boards/H3SK#H3SK_with_SINGLE_RANKED_DDR]]
  
 
[[File:R-Car-H3-topview.jpg|700px|Top view]]<br/>
 
[[File:R-Car-H3-topview.jpg|700px|Top view]]<br/>
Line 76: Line 115:
 
**T opr Operating ambient temperature 0°C to 40°C Do not expose to condensation
 
**T opr Operating ambient temperature 0°C to 40°C Do not expose to condensation
 
**Vcc 5V system power supply voltage (range 5V +- 5%)
 
**Vcc 5V system power supply voltage (range 5V +- 5%)
**I board Maximum current consumption 6A , 40W
+
**I board Maximum current consumption 8A , 40W
 +
=== H3SK with protection circuit threshold ===
 +
* RTP0RC77951SKBX010SA00[S/N 3001-3300]
 +
** 1. Displayout Connector(CN4) moved to the upper side of the board. <br>
 +
** 2. Added protection circuit (threshold: 5.15v).
 +
*** If you incorrectly input 12V to H3SK, it doesn't break.
 +
*** On the other hand, H3SK doesn't accept power supply of 5.15v or more by the protection circuit.
 +
** Recommended AC Adapter:
 +
*** [PSAA20R-050L6] https://www.digikey.com/product-detail/en/phihong-usa/PSAA20R-050L6/993-1365-ND/5418517 <br/>[[File:picture_PSAA20R-050L6_20190213.jpg|100px|PSAA20R]]
 +
*** [GST25U05-P1J ] https://www.mouser.jp/ProductDetail/MEAN-WELL/GST25U05-P1J?qs=sGAEpiMZZMt5w6YCUaBPUV4PLgOVZYgh46QsGbYViHyA1ECl3vWg8A== <br/>[[File:picture_GST25U05-P1J _20190213.jpg|100px|GST25U05]]<br/>
 +
** [[File:Procedure_for_disabling_protection_circuit_0308.pdf]]
 +
* RTP0RC77951SKBX010SA03[S/N 20201-20400, 25051-25550]
 +
** 1. Displayout Connector(CN4) moved to the upper side of the board. <br>
 +
** 2. Added protection circuit (threshold: 6.0v).
 +
*** If you incorrectly input 12V to H3SK, it doesn't break.
 +
 
 +
=== H3SK with SINGLE RANKED DDR ===
 +
The following R-Car Starter Kit Premier boards are equipped with single ranked DDR memory.
 +
 
 +
Type Name : RTP0RC77951SKBX010SA03
 +
Serial No : <span style="color:#ff0000">25669 - 25768,  25839 - </span>
 +
 
 +
==== <span style="color:#0000ff">Yocto</span>====
 +
<span style="color:#ff0000">Yocto v3.x series(Ex v3.21.0) and Yocto v4.1.0 do not support it.</span> </br>
 +
Please apply the following diff file manually and flash firmware to hyperflash. </br>
 +
[[File:H3SK-SingleRankedDDR.zip]]
 +
 
 +
Apply the "H3SK-SingleRankedDDR.diff”after "Step 3. Switch to proper branches/commits" </br>
 +
[Yocto v3.21.0] https://elinux.org/R-Car/Boards/Yocto-Gen3/v3.21.0#Build_using_manual_steps </br>
 +
[Yocto v4.1.0] https://elinux.org/R-Car/Boards/Yocto-Gen3/v4.1.0#Build_using_manual_steps </br>
 +
1. $ cd $WORK/meta-renesas </br>
 +
2. $ patch -p1 < ${YOUR_DOWNLOAD_PATH}/H3SK-SingleRankedDDR.diff </br>
 +
Return to "Step 4.Download proprietary driver modules to $WORK/proprietary folder" </br>
 +
(If you want to build only arm-trusted-firmware, please refer to [[R-Car/Boards/Yocto-Gen3-CommonFAQ/How_to_build_kernel_(u-boot,_ATF_etc)_individually|FAQ]])
 +
 
 +
 
 +
How to flash firmware : See [[R-Car/Boards/H3SK#In_case_of_DDR_8GiB_board]] </br>
 +
[Note] <span style="color:#ff0000">This "bl2-h3ulcb-4x2g.srec" can only be used with the above R-Car Starter Kit Premier.</br>
 +
 
 +
 
 +
[Note] Yocto v4.7.0 or later will fix the single ranked DDR memory.
 +
 
 +
 
 +
==== <span style="color:#0000ff">Android</span>====
 +
 
 +
<span style="color:#ff0000">Android P BSP does not support R-Car Starter Kit Premier with Single-ranked DDR.</span> </br>
 +
Please apply the patch below.
 +
 
 +
[[File:H3SK-SingleRankedDDR_for_Android_P_BSP.zip]]
 +
 
 +
After the step "Unpacking Android sources"([[R-Car/Boards/Kingfisher/Android/Android_P#Unpack_Android_Package | Unpack_Android_Package]]),
 +
please execute following commands to apply the patch.
 +
<syntaxhighlight lang=bash>
 +
cd ${workspace}/mydroid/device/renesas/bootloaders/ipl
 +
patch -p1 < ${path_to_patch}/H3SK-SingleRankedDDR_for_Android_P_BSP.diff
 +
</syntaxhighlight>
 +
Then, please return to the step "[[R-Car/Boards/Kingfisher/Android/Android_P#Building_the_BSP_for_R-Car_Starter_Kit_Premier.28H3.29 | Building the BSP for R-Car Starter Kit Premier(H3)]]"
  
 
== Where to buy ==
 
== Where to buy ==
R-Car Starter Kit Premier(WS2.0) board can be ordered from following distributors:
+
R-Car Starter Kit Premier(H3 v3.0) board(RTP0RC77951SKBX010SA03) can be ordered from following distributors:
 +
 
 +
[http://www.shimafuji.co.jp/en/products/1736 Click to buy R-Car Starter Kit Premier board from SHIMAFUJI ELECTRIC INCORPORATED] - <span style="color:#00ff00">World wide</span> - <span style="color:#ff0000">< Available ></span><br/>
 +
[https://www.marutsu.co.jp/pc/i/1509378/?mm19052303 Click to buy R-Car Starter Kit Premier board) from Marutsu-elec] - Japan Only <span style="color:#ff0000">< Available > </span><br/>
 +
 
 +
<!--
 +
[https://www.avnet.com/shop/us/p/uncategorized/renesas-electronics/r0p77951sk000s-yj1-3074457345632808011 Click to buy R-Car Starter Kit Premier board from AVNET] - World wide - Not available<br/>
 +
[http://www.futureelectronics.com/en/Technologies/Franchised/Product.aspx?ProductID=R0P77951SK000S-035YJ1REA&IM=0 Click to by R-Car Starter Kit Premier board from FUTURE] - World wide - Not available<br/>
  
[https://www.avnet.com/shop/us/p/uncategorized/renesas-electronics/r0p77951sk000s-yj1-3074457345632808011 Click to buy R-Car Starter Kit Premier board from AVNET] - World wide<br/>
 
[http://www.futureelectronics.com/en/Technologies/Franchised/Product.aspx?ProductID=R0P77951SK000S-035YJ1REA&IM=0 Click to by R-Car Starter Kit Premier board from FUTURE] - World wide<br/>
 
 
[https://www.marutsu.co.jp/pc/i/838003/ Click to buy R-Car Starter Kit Premier board from Marutsu-elec] - Japan Only - Not available<br/>
 
[https://www.marutsu.co.jp/pc/i/838003/ Click to buy R-Car Starter Kit Premier board from Marutsu-elec] - Japan Only - Not available<br/>
[http://www.chip1stop.com/search.do?classCd=&did=&keyword=RTP0RC77951 Click to by R-Car Starter Kit Premier board from chip1stop] - Japan Only<br/>
+
 
[https://www.digikey.com/product-detail/en/renesas-electronics-america/R0P77951SK000S-YJ1/R0P77951SK000S-YJ1-ND/7400353 Click to buy R-Car Starter Kit Premier board from Digi-key] - U.S only
+
[http://www.chip1stop.com/search.do?classCd=&did=&keyword=RTP0RC77951 Click to by R-Car Starter Kit Premier board from chip1stop] - Japan Only - Not available<br/>
 +
[https://www.digikey.com/product-detail/en/renesas-electronics-america/R0P77951SK000S-YJ1/R0P77951SK000S-YJ1-ND/7400353 Click to buy R-Car Starter Kit Premier board from Digi-key] - U.S only - Not available
 +
-->
  
 
== R-Car H3 SoC Documentation ==
 
== R-Car H3 SoC Documentation ==
  
*[https://www.renesas.com/en-us/doc/products/rcar/R-Car_StarterKit_Gen3_H3_M3_DEV_Rev.053.pdf R-Car H3/M3 Device Manual]
+
*[https://www.renesas.com/us/en/doc/products/rcar/R-Car_StarterKit_Gen3_H3_M3_DEV_Rev.200.pdf R-Car H3/M3 Device Manual]
  
 
== Official board documentation ==
 
== Official board documentation ==
  
*[https://www.renesas.com/en-us/doc/products/rcar/R-Car_StarterKit_Gen3_HWM_Rev.110a.pdf Hardware Manual]
+
*[https://www.renesas.com/us/en/doc/products/rcar/R-Car-H3-M3-Starter-Kit-Hardware-Manual-rev11.pdf Hardware Manual]
 
*[https://www.renesas.com/en-us/doc/products/rcar/R-Car_StarterKit_Gen3_SCH_Rev.110.pdf Schematic(H3 ver1.1 & M3 ver1.0)]
 
*[https://www.renesas.com/en-us/doc/products/rcar/R-Car_StarterKit_Gen3_SCH_Rev.110.pdf Schematic(H3 ver1.1 & M3 ver1.0)]
*[https://www.renesas.com/us/en/search/keyword-search.html#q=R-Car_StarterKit_Gen3_SCH_Rev.120.pdf Schematic(H3 ver2.0)]
+
*[https://www.renesas.com/us/en/search/keyword-search.html#q=R-Car_StarterKit_Gen3_SCH_Rev.120.pdf Schematic RTP0RC77951SKBX010SA00(H3 ver2.0)(S/N 2001-3000)]
 +
*[https://www.renesas.com/us/en/doc/products/rcar/R-Car_H3_StarterKit_SCH(SN3001-3300)_Rev.100.pdf Schematic RTP0RC77951SKBX010SA00(H3 ver2.0)(S/N 3001-3300)]
 +
*[https://www.renesas.com/us/en/doc/products/rcar/R-Car_H3_StarterKit_SCH(SN20201-20400,25051-25550)_Rev.100.pdf Schematic RTP0RC77951SKBX010SA03(DDR8GB)]
 +
<!--
 +
*[https://www.renesas.com/us/en/doc/products/rcar/R-Car_H3_StarterKit_SCH(SN20201-20400,25051-25550)_Rev.100.pdf Schematic RTP0RC77951SKBX010SA03(H3 ver2.0 DDR8GB(S/N 20201-20400), H3 ver3.0 DDR8GB(S/N 25051-25550)]
 +
-->
 
*[https://www.renesas.com/en-us/doc/products/rcar/R-Car_StarterKit_Gen3_BOM_Rev.110.pdf BOM list(H3 ver1.1 & M3 ver1.0)]
 
*[https://www.renesas.com/en-us/doc/products/rcar/R-Car_StarterKit_Gen3_BOM_Rev.110.pdf BOM list(H3 ver1.1 & M3 ver1.0)]
 
*[https://www.renesas.com/us/en/search/keyword-search.html#q=R-Car_StarterKit_Gen3_BOM_Rev.120.pdf BOM list(H3 ver2.0)]
 
*[https://www.renesas.com/us/en/search/keyword-search.html#q=R-Car_StarterKit_Gen3_BOM_Rev.120.pdf BOM list(H3 ver2.0)]
 +
*[https://www.renesas.com/us/en/doc/products/rcar/R-Car_Gen3_Staterkit_REV210_BOM.pdf BOM list(H3 ver3.0)]
 
*[https://www.renesas.com/jp/en/doc/products/rcar/R-Car_StarterKit_Gen3_BAM_Rev.120.pdf Assembly drawing]
 
*[https://www.renesas.com/jp/en/doc/products/rcar/R-Car_StarterKit_Gen3_BAM_Rev.120.pdf Assembly drawing]
 
*[https://www.renesas.com/en-us/doc/products/rcar/R-Car_StarterKit_Gen3_CEI_Rev.110.pdf CoM Express Interfaces]
 
*[https://www.renesas.com/en-us/doc/products/rcar/R-Car_StarterKit_Gen3_CEI_Rev.110.pdf CoM Express Interfaces]
Line 240: Line 348:
 
   * Kernel config: defconfig
 
   * Kernel config: defconfig
 
   * Kernel image: arch/arm64/boot/Image
 
   * Kernel image: arch/arm64/boot/Image
   * DTB (ws2.0): arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dtb
+
   * DTB (ws2.0): arch/arm64/boot/dts/renesas/r8a77951-ulcb.dtb
   * DTB (ws1.0/ws1.1): arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb.dtb
+
   * DTB (ws1.0/ws1.1): arch/arm64/boot/dts/renesas/r8a77950-ulcb.dtb
  
 
U-Boot boot command:
 
U-Boot boot command:
  
 
  tftpboot 0x48080000 Image
 
  tftpboot 0x48080000 Image
  tftpboot 0x48000000 r8a7795-h3ulcb.dtb  
+
  tftpboot 0x48000000 r8a77951-ulcb.dtb or r8a77950-ulcb.dtb
 
  booti 0x48080000 - 0x48000000
 
  booti 0x48080000 - 0x48000000
  
NOTE: ws2.0 silicon is supported since BSP2.19
+
NOTE: ws2.0 silicon is supported Yocto v2.19 or later.
 +
NOTE: RTP0RC77951SKBX010SA03(DDR 8GiB) is supported Yocto v3.13.0 or later.
 +
 
 +
Kernel v5.5 and older used different DTB names:
 +
  * DTB (ws2.0): arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dtb
 +
  * DTB (ws1.0/ws1.1): arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb.dtb
 +
  * DTB (RTP0RC77951SKBX010SA03(DDR 8GiB)): arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-4x2g.dtb
  
 
== Flashing firmware ==
 
== Flashing firmware ==
Line 258: Line 372:
 
</pre>
 
</pre>
 
{| class="wikitable"
 
{| class="wikitable"
|+ Writing data (Yocto v2.23, v3.4, v3.6, v3.7, v3.9 and v3.13)
+
|+ Writing data (Yocto v2.23, v3.4, v3.6, v3.7, v3.9 and v3.13 or later)
 
|-
 
|-
 
! Filename !! Program Top Address !! Flash Save Address !! Description
 
! Filename !! Program Top Address !! Flash Save Address !! Description
Line 274: Line 388:
 
| [Yocto v2.23, v3.4, v3.6, v3.7 and v3.9] u-boot-elf.srec || 0x50000000 || 0x640000 || U-Boot
 
| [Yocto v2.23, v3.4, v3.6, v3.7 and v3.9] u-boot-elf.srec || 0x50000000 || 0x640000 || U-Boot
 
|-
 
|-
| [Yocto v3.13] u-boot-elf-h3ulcb.srec || 0x50000000 || 0x640000 || U-Boot
+
| [Yocto v3.13 or later] u-boot-elf-h3ulcb.srec || 0x50000000 || 0x640000 || U-Boot
 
|}
 
|}
 
<br>
 
<br>
===<span style="color:#ff0000"><New></span>In case of DDR 8GiB board===
+
 
 +
===In case of DDR 8GiB board===
 
<pre>
 
<pre>
 
RTP0RC77951SKBX010SA03
 
RTP0RC77951SKBX010SA03
 
</pre>
 
</pre>
 
{| class="wikitable"
 
{| class="wikitable"
|+ Writing data (Yocto v3.13.0)
+
|+ Writing data (Yocto v3.13.0 or later)
 
|-
 
|-
 
! Filename !! Program Top Address !! Flash Save Address !! Description
 
! Filename !! Program Top Address !! Flash Save Address !! Description
Line 310: Line 425:
 
SW1=OFF
 
SW1=OFF
 
  ws1.0: SW6[all]=OFF
 
  ws1.0: SW6[all]=OFF
  ws1.1/ws2.0: SW6[1]=ON, SW6[2]=ON, SW6[3]=OFF, SW6[4]=ON
+
  ws1.1/ws2.0/ws3.0: SW6[1]=ON, SW6[2]=ON, SW6[3]=OFF, SW6[4]=ON
 
JP1 -> 1-2 short
 
JP1 -> 1-2 short
 
</pre>
 
</pre>
Line 326: Line 441:
 
  ws1.0: SW6[3]=ON
 
  ws1.0: SW6[3]=ON
 
  ws1.1: SW6[1]=OFF, SW6[3]=ON
 
  ws1.1: SW6[1]=OFF, SW6[3]=ON
  ws2.0: SW6[3]=ON
+
  ws2.0/ws3.0: SW6[3]=ON
 
</pre>  
 
</pre>  
 
<li> Flash bootparam_sa0.srec. In console execute xls2 command (load program to hyper flash) and provide the following inputs:
 
<li> Flash bootparam_sa0.srec. In console execute xls2 command (load program to hyper flash) and provide the following inputs:
Line 402: Line 517:
  
 
</ol>
 
</ol>
 +
 +
== Tips ==
 +
=== Flashing firmware by using CPLD and Flash Writer ===
 +
{{Template:R-Car-Gen3-CPLD-Flash-IPL}}
  
 
== Test procedures ==
 
== Test procedures ==
  
 
== Known Issues ==
 
== Known Issues ==
<ol>
 
 
<li>Some H3 v2.0 SK(RTP0RC77951SKBX010SA00) have been confirmed to freeze the system (Ex. Yocto v2.23.1, v3.4.0, v3.6.0 and v3.7.0).<br/>
 
<li>Some H3 v2.0 SK(RTP0RC77951SKBX010SA00) have been confirmed to freeze the system (Ex. Yocto v2.23.1, v3.4.0, v3.6.0 and v3.7.0).<br/>
 
If it stops please update to Yocto v3.9.0 or later.<br/>
 
If it stops please update to Yocto v3.9.0 or later.<br/>
 
</li>
 
</li>
 
+
<li> The following H3 Starter Kit boards have PCIe 1ch disabled.<br/>
 +
<pre>
 +
Serial Number: 3001-3300
 +
Serial Number: 20201-20400
 +
</pre>
 +
[Note] Please check the Serial Number carefully on your board.<br/><br/>
 +
How to enable:
 +
* If you don't use PCIe 1ch, ignore this "Known Issue".
 +
* PCIe 1ch is connected to ComEx(CN1) of H3 Starter Kit.
 +
<ol>
 +
<li> Connect WinPC and H3 Starter Kit board(CN12) with a USB cable <li/>
 +
<li> [H3 SK] Power on <li/>
 +
<li> [WinPC] Run the exe(*) file <li/>
 +
<li> [WinPC] Select "OK" <li/>
 +
<li> [WinPC] If you succeed, you can confirm the "CPLD configured successfully (New version:2019/04/08)".<li/>
 +
(*) [[File:H3_StarterKit_CPLD_Update_20190408.zip]] <br/><br/>
 +
<TIPS> If you fail, try another winPC or try USB HUB(WinPC -- USB HUB -- USB Cable -- H3 SK(CN12)).<br/>
 +
</li>
 
</ol>
 
</ol>
  
 
== Limitation ==
 
== Limitation ==
 
<ol>
 
<ol>
Yocto v3.4 and later don't support H3 v1.1 Starter Kit (RTP0RC7795SKBX0010SA00). <br>
+
Yocto v3.4 or later don't support H3 v1.1 Starter Kit (RTP0RC7795SKBX0010SA00). <br>
 
Please use the H3 v2.0 SK.
 
Please use the H3 v2.0 SK.
 
</ol>
 
</ol>
  
== FAQ ==
+
== Q&A site ==
 +
http://renesasrulz.com/r-car-h3-m3-cockpit/
  
http://elinux.org/Talk:R-Car/Boards/Yocto-Gen3
+
== FAQ page ==
 +
https://elinux.org/R-Car/Boards/Yocto-Gen3-CommonFAQ
  
 
== Appendix ==
 
== Appendix ==
 
<ol>
 
<ol>
 
<li>
 
<li>
RTP0RC77951SKBX010SA03 board with 8GB DDR will be supported around November.
+
RTP0RC77951SKBX010SA03 board with 8GB DDR support is available in Yocto v3.9.0.
If you already have this board please apply following patch to Yocto v3.9.0.<br>
+
<br>
[[File:yocto390-h3-8gbddr-sk.zip]]<br><br>
 
 
<How to build><br>
 
<How to build><br>
 
https://elinux.org/R-Car/Boards/Yocto-Gen3#Building_the_BSP_for_Renesas_H3_Starter_Kit.2C_M3_Starter_Kit<br>
 
https://elinux.org/R-Car/Boards/Yocto-Gen3#Building_the_BSP_for_Renesas_H3_Starter_Kit.2C_M3_Starter_Kit<br>
1-1. after "step 3" of the above link
+
1-1. after "step 10"<br>
<pre>
 
cd $WORK/meta-renesas
 
patch -p1 < /PATH/yocto390-h3-8gbddr-sk.patch
 
</pre>
 
1-2. after "step 10"<br>
 
 
Edit local.conf and select the board type<br>
 
Edit local.conf and select the board type<br>
 
{| class="wikitable"
 
{| class="wikitable"
! Board type name !! H3_OPTIOM
+
! Board type name !! H3_OPTION
 
|-
 
|-
! RTP0RC77951SKBX010SA03 !! 1 (default)
+
! RTP0RC77951SKBX010SA03 !! 1
 
|-
 
|-
! RTP0RC77951SKBX010SA00, RTP0RC77951SKBX010SA01 !! 0
+
! RTP0RC77951SKBX010SA00, RTP0RC77951SKBX010SA01 !! 0 (default)
 
|}
 
|}
1-3. after "step 11(12, 13)"<br>
+
Add the following lines to local.conf to enable 8GB support:
You can find new dtb file.<br>
+
<pre>
./tmp/deploy/images/h3ulcb/Image-r8a7795-h3ulcb-4x2g.dtb
+
# For H3 SiP DDR 8GiB (2GiB x 4ch)                                                                                                                                                           
<br><br>
+
H3_OPTION_forcevariable = "1"
 +
</pre>
 +
1-2. after "step 11(12, 13)"<br>
 +
You can find new dtb files in the images directory:
 +
<pre>
 +
ls -1 tmp/deploy/images/h3ulcb/Image-r8a7795-h3ulcb-4x2g*.dtb
 +
tmp/deploy/images/h3ulcb/Image-r8a7795-h3ulcb-4x2g-kf.dtb
 +
tmp/deploy/images/h3ulcb/Image-r8a7795-h3ulcb-4x2g-vb2.1.dtb
 +
tmp/deploy/images/h3ulcb/Image-r8a7795-h3ulcb-4x2g-vb2.dtb
 +
tmp/deploy/images/h3ulcb/Image-r8a7795-h3ulcb-4x2g-vb.dtb
 +
</pre>
 +
ARM Trusted Firmware and U-Boot images will now have 8GB DDR support:
 +
<pre>
 +
tmp/deploy/images/h3ulcb/bl2-h3ulcb.srec
 +
tmp/deploy/images/h3ulcb/bl31-h3ulcb.srec
 +
tmp/deploy/images/h3ulcb/cert_header_sa6.srec
 +
tmp/deploy/images/h3ulcb/u-boot-elf-h3ulcb.srec
 +
</pre>
 +
<br>
 
Note:
 
Note:
 +
If you change "H3_OPTION", please clean before building.
 
<pre>
 
<pre>
If you change "H3_OPTION", please clean before building.
+
# vi ./conf/local.conf
Ex)
+
# bitbake -c cleanall arm-trusted-firmware u-boot
# vi ./conf/local.conf
+
# bitbake arm-trusted-firmware u-boot
# bitbake -c cleanall arm-trusted-firmware
 
# bitbake arm-trusted-firmware
 
 
</pre>
 
</pre>
 
</li>
 
</li>
 
</ol>
 
</ol>

Latest revision as of 02:34, 2 December 2020


Introduction

This is the Wiki for the Renesas R-Car Starter Kit Premier board. Refer to the R-Car page for information about Renesas' R-Car SoC family.

Topic

R-Car Starter Kit is available

R-Car Starter Kit information
Board Name SoC version Hardware information Where to buy
R-Car Starter Kit Premier (H3) v3.0 Click here Click here
R-Car Starter Kit Pro (M3) v3.0 Click here Click here

R-Car Starter Kit Premier(H3 v3.0) Manufacturing Plan

  • 1st lot : Jul, 2020 (Sold Out)
  • 2nd lot : Oct, 2020 (For Sale)
  • 3rd lot : Dec, 2020 (Under manufacturing)

    R-Car Starter Kit Pro(M3 v3.0) Manufacturing Plan

  • 1st lot : Jul, 2020 (Sold out)
  • 2nd lot : Sep, 2020 (For sale)
  • 3rd lot : Under planning

    SW Release Information

    Board name SW name Release date Note
    R-Car Starter Kit ( Premier / Pro ) Yocto v4.1.0 2020/08/06 This version does not support MMP.
    GFX(except for Wayland/weston) is supported from 2020/09/23.
    Yocto v3.21.0 2019/07/09 New R-Car Starter Kit Pro(RTP8J77961ASKB0SK0SA05A) is supported from 2020/07/10.
    Kingfisher Infotainment Board Android P [New!!] 2020/09/29 Only R-Car Starter Kit Premier(R-Car H3) + Kingfisher is supported.
    Yocto v3.21.0 2019/08/07 To check for latest information, please refer to the meta-rcar.
    New R-Car Starter Kit Pro(RTP8J77961ASKB0SK0SA05A) is supported from 2020/08/02.
    Yocto v4.1.0 2020/10/23 This version does not support MMP.

    [Note]:
    The URL for downloading "Multimedia and Graphics library and related Linux drivers" has changed.
    [OLD] https://www.renesas.com/us/en/solutions/automotive/rcar-download/rcar-demoboard.html
    [NEW] https://www.renesas.com/us/en/application/automotive/r-car-h3-m3-h2-m2-e2-documents-software

    Currently, when you download the package from the following site, the file name is automatically changed.
    https://www.renesas.com/us/en/application/automotive/r-car-h3-m3-h2-m2-e2-documents-software
    See the "Required packages" chapter on each page.




    Hardware

    H3SK has several kinds of boards

  • H3 WS1.1 silicon mounted board
    Type name: RTP0RC7795SKBX0010SA00
    
  • H3 WS2.0 silicon mounted board
    Type name: RTP0RC77951SKBX010SA00[S/N 2001~3000] (LPDDR4: DDR 4GiB(Samsung 1GB x4), eMMC 8GB(Samsung))
    Type name: RTP0RC77951SKBX010SA00[S/N 3001~3300] (LPDDR4: DDR 4GiB(Samsung 1GB x4), eMMC 64GB(SanDisk))
    Type name: RTP0RC77951SKBX010SA01[S/N 4001-4500] (LPDDR4: DDR 4GiB(Micron 1GB x4), eMMC 8GB(Micron))
    Type name: RTP0RC77951SKBX010SA03[S/N 20001-20200] (LPDDR4: DDR 8GiB(Samsung 2GB x4) Dual Rank, eMMC 32GB(Samsung))
    Type name: RTP0RC77951SKBX010SA03[S/N 20201-20400] (LPDDR4: DDR 8GiB(Samsung 2GB x4) Dual Rank, eMMC 32GB(SanDisk))
    
  • H3 WS3.0 silicon mounted board
    Type name: RTP0RC77951SKBX010SA03[S/N 25051-25668, 25769-25838 ] (LPDDR4: DDR 8GiB(Samsung 2GB x4) Dual Rank, eMMC 128GB(Samsung))
    Type name: RTP0RC77951SKBX010SA03[S/N 25669-25768, 25839-25999 ] (LPDDR4: DDR 8GiB(Samsung 2GB x4) Single Rank, eMMC 128GB(Samsung))
    
    H3 SK variation
    Type Name Serial Number SoC version DDR eMMC Protection circuit threshold
    RTP0RC77951SKBX010SA00 2001-3000 2.0 4GiB(Samsung 1GB x4) 8GB(Samsung) none
    RTP0RC77951SKBX010SA00 3001-3300 2.0 4GiB(Samsung 1GB x4) 64GB(SanDisk) 5.15 volt
    RTP0RC77951SKBX010SA01 4001-4500 2.0 4GiB(Micron 1GB x4) 8GB(Micron) none
    RTP0RC77951SKBX010SA03 20001-20200 2.0 8GiB(Samsung 2GB x4), Dual Rank 32GB(Samsung) none
    RTP0RC77951SKBX010SA03 20201-20400 2.0 8GiB(Samsung 2GB x4), Dual Rank 32GB(SanDisk) 6.0 volt
    RTP0RC77951SKBX010SA03 25051-25668, 25769-25838 3.0 8GiB(Samsung 2GB x4), Dual Rank 128GB(Samsung) 6.0 volt
    RTP0RC77951SKBX010SA03 (*) 25669-25768, 25839-25999 3.0 8GiB(Samsung 2GB x4), Single Rank 128GB(Samsung) 6.0 volt

    (*) Note: See R-Car/Boards/H3SK#H3SK_with_SINGLE_RANKED_DDR

    Top view
    Bottom view

    Hardware Features

    • R-CAR H3
      • ARM CA57 (ARMv8) 1.5 GHz quad core, with NEON/VFPv4, L1$ I/D 48K/32K, L2$ 2MB
      • ARM CA53 (ARMv8) 1.2 GHz quad core, with NEON/VFPv4, L1$ I/D 32K/32K, L2$ 512K
      • Memory controller for LPDDR4-3200 4GB in 2 channels, each 64-bit wide
      • Two- and three-dimensional graphics engines,
      • Video processing units,
      • 3 channels Display Output,
      • 6 channels Video Input,
      • SD card host interface,
      • USB3.0 and USB2.0 interfaces,
      • CAN interfaces
      • Ethernet AVB
      • PCI Express Interfaces
    • Memories
      • INTERNAL 384KB SYSTEM RAM
      • DDR 4 GB LPDDR4
      • HYPERFLASH 64 MB HYPER FLASH (512 MBITS, 160 MHZ, 320 MBYTES/S)
      • QSPI FLASH 16MB QSPI (128 MBITS,80 MHZ,80 MBYTES/S)1 HEADER QSPI MODULE
      • EMMC 8 GB EMMC (HS400 240 MBYTES/S)
      • MICROSD-CARD SLOT (SDR104 100 MBYTES/S)
    • Connectors
      • CN1 COM Express type connector 440pin
      • CN2 QSPI Flash module
      • CN3 DEBUG JTAG
      • CN4 HDMI
      • CN5 USB 2.0
      • CN6 Push-Pull microSD Card Socket
      • CN7 Ethernet, Connector, RJ45
      • CN8 LINE Out
      • CN9 MIC Input
      • CN10 DEBUG SERIAL (not populated)
      • CN11 CPLD Programming JTAG
      • CN12 DEBUG SERIAL (serial)
      • CN13 Main Power Supply input (5VDC)
      • CN14 CPU Fan
    • Switches
      • SW1 Hyper Flash
      • SW2 Software Readable DIPSWITCHES (4x)
      • SW3 Software Readable Push button
      • SW4 Software Readable Push button
      • SW5 Software Readable Push button
      • SW6 Mode Settings
      • SW7 CPLD Reset
      • SW8 Power
      • SW9 Reset
    • Board specifications
      • Dimensions: 95mm × 95mm
      • Board thickness: 1.6mm
      • External power supply 5V / 6A max, Ripple & Noise (Vp-p) Full load 200mV
      • T opr Operating ambient temperature 0°C to 40°C Do not expose to condensation
      • Vcc 5V system power supply voltage (range 5V +- 5%)
      • I board Maximum current consumption 8A , 40W

    H3SK with protection circuit threshold

    H3SK with SINGLE RANKED DDR

    The following R-Car Starter Kit Premier boards are equipped with single ranked DDR memory.

    Type Name : RTP0RC77951SKBX010SA03
    Serial No : 25669 - 25768,  25839 - 
    

    Yocto

    Yocto v3.x series(Ex v3.21.0) and Yocto v4.1.0 do not support it.
    Please apply the following diff file manually and flash firmware to hyperflash.

    File:H3SK-SingleRankedDDR.zip
    

    Apply the "H3SK-SingleRankedDDR.diff”after "Step 3. Switch to proper branches/commits"
    [Yocto v3.21.0] https://elinux.org/R-Car/Boards/Yocto-Gen3/v3.21.0#Build_using_manual_steps
    [Yocto v4.1.0] https://elinux.org/R-Car/Boards/Yocto-Gen3/v4.1.0#Build_using_manual_steps
    1. $ cd $WORK/meta-renesas
    2. $ patch -p1 < ${YOUR_DOWNLOAD_PATH}/H3SK-SingleRankedDDR.diff
    Return to "Step 4.Download proprietary driver modules to $WORK/proprietary folder"
    (If you want to build only arm-trusted-firmware, please refer to FAQ)


    How to flash firmware : See R-Car/Boards/H3SK#In_case_of_DDR_8GiB_board
    [Note] This "bl2-h3ulcb-4x2g.srec" can only be used with the above R-Car Starter Kit Premier.


    [Note] Yocto v4.7.0 or later will fix the single ranked DDR memory.


    Android

    Android P BSP does not support R-Car Starter Kit Premier with Single-ranked DDR.
    Please apply the patch below.

    File:H3SK-SingleRankedDDR for Android P BSP.zip
    

    After the step "Unpacking Android sources"( Unpack_Android_Package), please execute following commands to apply the patch.

    cd ${workspace}/mydroid/device/renesas/bootloaders/ipl
    patch -p1 < ${path_to_patch}/H3SK-SingleRankedDDR_for_Android_P_BSP.diff
    

    Then, please return to the step " Building the BSP for R-Car Starter Kit Premier(H3)"

    Where to buy

    R-Car Starter Kit Premier(H3 v3.0) board(RTP0RC77951SKBX010SA03) can be ordered from following distributors:

    Click to buy R-Car Starter Kit Premier board from SHIMAFUJI ELECTRIC INCORPORATED - World wide - < Available >
    Click to buy R-Car Starter Kit Premier board) from Marutsu-elec - Japan Only < Available >


    R-Car H3 SoC Documentation

    Official board documentation

    Kingfisher (R-Car Starter Kit extension board)

    Instruction of using H3SK with the Kingfisher board located here http://elinux.org/R-Car/Boards/Kingfisher

    Quick Start How To

    This sections describes steps that are necessary to run a "Hello, World!" application using Yocto build. Both X11 and Wayland are supported.

    Build Yocto image

    Refer to Yocto for steps necessary for making a Yocto image.

    Connect 5 V power supply to the board

    Use 5 V power supply with a 5.5 mm barrel plug. The power supply should be able to provide 4(Min) ~ 8(Max)Amps.

    Note

    • The recommended value is 8 Amps. But, user can use 4 Amps. and 6 Amps. (depends on the use case).

    Connect to serial console

    Use a microUSB cable to connect the PC to R-Car Starter Kit Premier (H3ULCB) board. CN12 ("CPLD/DEBUG") must be used on Starter Kit side. It is routed to SCIF2 in the R-Car H3 via a FT232 interface converter chip.

    On Linux, FT232 driver is included with kernel versions >=2.6.12. Windows driver and sources can be found on FTDI Chip website.

    Serial settings are 115200 8N1. Any standard terminal emulator program can be used.

    On Linux:

    picocom

    sudo picocom -b 115200 DEVICE
    

    replace DEVICE with the proper tty device name, for example /dev/ttyUSB0. Running dmesg | tail can help locating proper device. After the successful connection, picocom should display:

    picocom v1.7
    port is  : /dev/ttyUSB0 flowcontrol  : none baudrate is  : 115200 parity is  : none databits are  : 8 escape is  : C-a local echo is  : no noinit is  : no noreset is  : no nolock is  : no send_cmd is  : sz -vv receive_cmd is : rz -vv imap is  : omap is  : emap is  : crcrlf,delbs,
    Terminal ready

    Use Ctrl+A, Ctrl+Q to exit picocom.

    minicom

    sudo minicom -b 115200 -D DEVICE
    

    replace DEVICE with the proper tty device name, for example /dev/ttyUSB0. Running dmesg | tail can help locating proper device. After the successful connection, minicom should display:

    Welcome to minicom 2.6.2
    OPTIONS: I18n Compiled on Aug 7 2013, 13:32:48. Port /dev/ttyUSB0
    Press CTRL-A Z for help on special keys

    Use Ctrl+A, Q to exit minicom.

    Power on the board and go to U-Boot prompt

    Short-press SW8 "Power" to switch the board on. Then you should see the following output in the terminal:

    Welcome to minicom 2.7
    OPTIONS: I18n Compiled on Jan 1 2014, 17:13:19. Port /dev/ttyUSB0, 18:31:48
    Press CTRL-A Z for help on special keys
    NOTICE: BL2: R-Car Gen3 Initial Program Loader(CA57) Rev.1.0.9 NOTICE: BL2: PRR is R-Car H3 ES1.1 NOTICE: BL2: Boot device is HyperFlash(80MHz) NOTICE: BL2: LCM state is CM NOTICE: BL2: AVS setting succeeded. DVFS_SetVID=0x52 NOTICE: BL2: DDR1600(rev.0.10) NOTICE: BL2: DRAM Split is 4ch NOTICE: BL2: QoS is default setting(rev.0.32) NOTICE: BL2: Lossy Decomp areas NOTICE: Entry 0: DCMPAREACRAx:0x80000540 DCMPAREACRBx:0x570 NOTICE: Entry 1: DCMPAREACRAx:0x40000000 DCMPAREACRBx:0x0 NOTICE: Entry 2: DCMPAREACRAx:0x20000000 DCMPAREACRBx:0x0 NOTICE: BL2: v1.1(release):3ad02ac NOTICE: BL2: Built : 13:03:52, Sep 20 2016 NOTICE: BL2: Normal boot NOTICE: BL2: dst=0xe631a208 src=0x8180000 len=512(0x200) NOTICE: BL2: dst=0x43f00000 src=0x8180400 len=6144(0x1800) NOTICE: BL2: dst=0x44000000 src=0x81c0000 len=65536(0x10000) NOTICE: BL2: dst=0x44100000 src=0x8200000 len=524288(0x80000) NOTICE: BL2: dst=0x50000000 src=0x8640000 len=1048576(0x100000)
    U-Boot 2015.04 (Sep 23 2016 - 18:54:42)
    CPU: Renesas Electronics R8A7795 rev 1.1 Board: H3ULCB I2C: ready DRAM: 3.9 GiB MMC: sh-sdhi: 0, sh-sdhi: 1 In: serial Out: serial Err: serial Net: ravb Hit any key to stop autoboot: 3

    Quickly hit any key to get into U-boot command prompt. Use SW9 ("Reset") to reboot the board when necessary.
    You should see the following:

    Hit any key to stop autoboot:  0                                                                                                            
    =>
    

    Change/update MAC address for Ethernet interface

    In U-boot command line type:

    => setenv ethact ravb
    => setenv ethaddr aa:bb:cc:dd:ee:ff
    => saveenv
    

    The original (board default) MAC address can be found on the label on top of RJ45 connector.

    A user who purchased H3SK board must set the above by himself.

    Configure U-Boot to boot over TFTP + NFS or from a micro SD card

    Refer to Yocto page for steps necessary for running Yocto.

    Serial Console

    Use a micro-USB cable to connect to "Debug Serial-0" (CN10 for ws1.0, CN12 for ws1.1/ws2.0). Serial settings are 115200 8N1.

    Booting Linux

     * Kernel config: defconfig
     * Kernel image: arch/arm64/boot/Image
     * DTB (ws2.0): arch/arm64/boot/dts/renesas/r8a77951-ulcb.dtb
     * DTB (ws1.0/ws1.1): arch/arm64/boot/dts/renesas/r8a77950-ulcb.dtb
    

    U-Boot boot command:

    tftpboot 0x48080000 Image
    tftpboot 0x48000000 r8a77951-ulcb.dtb or r8a77950-ulcb.dtb
    booti 0x48080000 - 0x48000000
    

    NOTE: ws2.0 silicon is supported Yocto v2.19 or later. NOTE: RTP0RC77951SKBX010SA03(DDR 8GiB) is supported Yocto v3.13.0 or later.

    Kernel v5.5 and older used different DTB names:

     * DTB (ws2.0): arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dtb
     * DTB (ws1.0/ws1.1): arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb.dtb
     * DTB (RTP0RC77951SKBX010SA03(DDR 8GiB)): arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-4x2g.dtb
    

    Flashing firmware

    In case of DDR 4GiB board

    RTP0RC77951SKBX010SA00
    RTP0RC77951SKBX010SA01
    
    Writing data (Yocto v2.23, v3.4, v3.6, v3.7, v3.9 and v3.13 or later)
    Filename Program Top Address Flash Save Address Description
    bootparam_sa0.srec 0xE6320000 0x000000 Loader(Boot parameter)
    bl2-h3ulcb.srec 0xE6304000 0x040000 Loader
    cert_header_sa6.srec 0xE6320000 0x180000 Loader(Certification)
    bl31-h3ulcb.srec 0x44000000 0x1C0000 ARM Trusted Firmware
    tee-h3ulcb.srec 0x44100000 0x200000 OP-Tee
    [Yocto v2.23, v3.4, v3.6, v3.7 and v3.9] u-boot-elf.srec 0x50000000 0x640000 U-Boot
    [Yocto v3.13 or later] u-boot-elf-h3ulcb.srec 0x50000000 0x640000 U-Boot


    In case of DDR 8GiB board

    RTP0RC77951SKBX010SA03
    
    Writing data (Yocto v3.13.0 or later)
    Filename Program Top Address Flash Save Address Description
    bootparam_sa0-4x2g.srec 0xE6320000 0x000000 Loader(Boot parameter)
    bl2-h3ulcb-4x2g.srec 0xE6304000 0x040000 Loader
    cert_header_sa6-4x2g.srec 0xE6320000 0x180000 Loader(Certification)
    bl31-h3ulcb-4x2g.srec 0x44000000 0x1C0000 ARM Trusted Firmware
    tee-h3ulcb.srec 0x44100000 0x200000 OP-Tee
    u-boot-elf-h3ulcb-4x2g.srec 0x50000000 0x640000 U-Boot
    1. Power off the board
    2. Press SW8
      
    3. Set SW and JP as follows:
    4. SW1=OFF
       ws1.0: SW6[all]=OFF
       ws1.1/ws2.0/ws3.0: SW6[1]=ON, SW6[2]=ON, SW6[3]=OFF, SW6[4]=ON
      JP1 -> 1-2 short
      
    5. Power on the board
    6. Press SW8
      Minimonitor starts and provides prompts on console
      
    7. Change SW as follows:
    8. SW1=ON
       ws1.0: SW6[3]=ON
       ws1.1: SW6[1]=OFF, SW6[3]=ON
       ws2.0/ws3.0: SW6[3]=ON
      
    9. Flash bootparam_sa0.srec. In console execute xls2 command (load program to hyper flash) and provide the following inputs:
    10. 3
      y
      e6320000
      0
      type "ctrl+A S" and select upload method "ascii", then choose file for uploading "bootparam_sa0.srec", after upload finished press any key
      y
      
    11. Flash bl2-h3ulcb.srec. In console execute xls2 command (load program to hyper flash) and provide the following inputs:
    12. 3
      y
      e6304000 (e6302000 if using Yocto BSP versions v2.12 and v2.16)
      40000
      type "ctrl+A S" and select upload method "ascii", then choose file for uploading "bl2-h3ulcb.srec", after upload finished press any key
      y
      
    13. Flash cert_header_sa6.srec. In console execute xls2 command (load program to hyper flash) and provide the following inputs:
    14. 3
      y
      e6320000
      180000
      type "ctrl+A S" and select upload method "ascii", then choose file for uploading "cert_header_sa6.srec", after upload finished press any key
      y
      
    15. Flash bl31-h3ulcb.srec. In console execute xls2 command (load program to hyper flash) and provide the following inputs:
    16. 3
      y
      44000000
      1C0000
      type "ctrl+A S" and select upload method "ascii", then choose file for uploading "bl31-h3ulcb.srec", after upload finished press any key
      y
      
    17. Flash tee-h3ulcb.srec. In console execute xls2 command (load program to hyper flash) and provide the following inputs:
    18. 3
      y
      44100000
      200000
      type "ctrl+A S" and select upload method "ascii", then choose file for uploading "tee-h3ulcb.srec", after upload finished press any key
      y
      
    19. Flash u-boot-elf.srec. In console execute xls2 command (load program to hyper flash) and provide the following inputs:
    20. 3
      y
      50000000 (49000000 if using Yocto BSP version v2.12)
      640000
      type "ctrl+A S" and select upload method "ascii", then choose file for uploading "u-boot-elf.srec", after upload finished press any key
      y
      
    21. Reset the board
    22. Press SW9
      


    Tips

    Flashing firmware by using CPLD and Flash Writer

    By using CPLD and Flash Writer, it is enabled to flash IPLs(firmware) without changing any switch(SW1/SW6) on R-Car Gen3 Starter Kit.
    There are two steps to prepare to write IPLs.
    First, reboot R-Car Gen3 Starter Kit in "SCIF Download Mode" via CPLD.
    Then, send Flash Writer binary to the board.
    After launching Flash Writer, it is possible to write IPLs by using xls2 command.

    • Initial SW1/6 status
      • SW1: ON
      • SW6[all]: ON
    How to reboot in "SCIF Download Mode" via CPLD

    There are two ways to reboot in "SCIF Download Mode" via CPLD.
    It is enough to execute one of the following.

    1. Using U-boot
      => cpld write 0x00 0x802181fe 
      => cpld write 0x80 0x01
      
    2. Using cpld-control
      1. Build cpld-control for Host PC
        $ sudo apt install libftdi-dev
        $ make
        
      2. execute following script.
        #!/bin/bash
        DEV_NAME="/dev/ttyUSB0"
        USB_NAME=$( dmesg | grep "attached to ${DEV_NAME##*/}" | tail -1 | grep -oP "(?<=usb )[^:]+" )
        SERIAL_NAME=$( dmesg | grep -oP "(?<=usb $USB_NAME: SerialNumber: ).*" | tail -1 )
        USB_NAME+=":"$( dmesg | grep -oP "(?<=ftdi_sio $USB_NAME:)[^:]+" | tail -1 )
        
        if [[ "$(id -u)" != "0" ]]; then
            echo Please run as root!
            exit 1
        fi
        
        # enter SCIF Download Mode
        stty -F $DEV_NAME 115200
        ./cpld-control -w $SERIAL_NAME 0x00 0x802181FE # For aarch32 flash writer 
        # ./cpld-control -w $SERIAL_NAME 0x00 0x8021813E # For aarch64 flash writer
        ./cpld-control -w $SERIAL_NAME 0x80 0x01
        echo "$USB_NAME" > /sys/bus/usb/drivers/ftdi_sio/bind
        
        exit
        
        Note: Even if reboot in "SCIF Download mode" is succeeded, there is no output on terminal(Ex. minicom).
    How to boot Flash Writer
    1. Build Flash Writer
      $ make AArch=32 clean
      $ CROSS_COMPILE=~/gcc-linaro-7.3.1-2018.05-x86_64_arm-eabi/bin/arm-eabi- make AArch=32 BOARD=ULCB
      
      Note: build option "BOARD=ULCB" and "AArch=32" are required.
      Note: Specific cross compiler is also required(https://github.com/renesas-rcar/flash_writer/blob/rcar_gen3/docs/application-note.md#41-prepare-the-compiler).
    2. Send Flash Writer to the board
      ex) Using minicom
      Type "ctrl+A S" and select upload method "ascii", then choose file for uploading "AArch32_Flash_writer_SCIF_DUMMY_CERT_E6300400_ULCB.mot", after upload finished press any key.
      Then, message like below is shown in terminal
      > Flash writer for R-Car H3/M3/M3N Series Vx.xx <Date>
      
    How to flash IPLs

    Please refer to the following pages:

    After flashing IPLs , please reboot the board by SW8 to reset CPLD register.

    Test procedures

    Known Issues

  • Some H3 v2.0 SK(RTP0RC77951SKBX010SA00) have been confirmed to freeze the system (Ex. Yocto v2.23.1, v3.4.0, v3.6.0 and v3.7.0).
    If it stops please update to Yocto v3.9.0 or later.
  • The following H3 Starter Kit boards have PCIe 1ch disabled.
    Serial Number: 3001-3300
    Serial Number: 20201-20400
    

    [Note] Please check the Serial Number carefully on your board.

    How to enable:

    • If you don't use PCIe 1ch, ignore this "Known Issue".
    • PCIe 1ch is connected to ComEx(CN1) of H3 Starter Kit.
    1. Connect WinPC and H3 Starter Kit board(CN12) with a USB cable
    2. [H3 SK] Power on
    3. [WinPC] Run the exe(*) file
    4. [WinPC] Select "OK"
    5. [WinPC] If you succeed, you can confirm the "CPLD configured successfully (New version:2019/04/08)".
    6. (*) File:H3 StarterKit CPLD Update 20190408.zip

      <TIPS> If you fail, try another winPC or try USB HUB(WinPC -- USB HUB -- USB Cable -- H3 SK(CN12)).

    Limitation

      Yocto v3.4 or later don't support H3 v1.1 Starter Kit (RTP0RC7795SKBX0010SA00).
      Please use the H3 v2.0 SK.

    Q&A site

    http://renesasrulz.com/r-car-h3-m3-cockpit/

    FAQ page

    https://elinux.org/R-Car/Boards/Yocto-Gen3-CommonFAQ

    Appendix

    1. RTP0RC77951SKBX010SA03 board with 8GB DDR support is available in Yocto v3.9.0.
      <How to build>
      https://elinux.org/R-Car/Boards/Yocto-Gen3#Building_the_BSP_for_Renesas_H3_Starter_Kit.2C_M3_Starter_Kit
      1-1. after "step 10"
      Edit local.conf and select the board type
      Board type name H3_OPTION
      RTP0RC77951SKBX010SA03 1
      RTP0RC77951SKBX010SA00, RTP0RC77951SKBX010SA01 0 (default)

      Add the following lines to local.conf to enable 8GB support:

      # For H3 SiP DDR 8GiB (2GiB x 4ch)                                                                                                                                                             
      H3_OPTION_forcevariable = "1"
      

      1-2. after "step 11(12, 13)"
      You can find new dtb files in the images directory:

      ls -1 tmp/deploy/images/h3ulcb/Image-r8a7795-h3ulcb-4x2g*.dtb
      tmp/deploy/images/h3ulcb/Image-r8a7795-h3ulcb-4x2g-kf.dtb
      tmp/deploy/images/h3ulcb/Image-r8a7795-h3ulcb-4x2g-vb2.1.dtb
      tmp/deploy/images/h3ulcb/Image-r8a7795-h3ulcb-4x2g-vb2.dtb
      tmp/deploy/images/h3ulcb/Image-r8a7795-h3ulcb-4x2g-vb.dtb
      

      ARM Trusted Firmware and U-Boot images will now have 8GB DDR support:

      tmp/deploy/images/h3ulcb/bl2-h3ulcb.srec
      tmp/deploy/images/h3ulcb/bl31-h3ulcb.srec
      tmp/deploy/images/h3ulcb/cert_header_sa6.srec
      tmp/deploy/images/h3ulcb/u-boot-elf-h3ulcb.srec
      


      Note: If you change "H3_OPTION", please clean before building.

      # vi ./conf/local.conf
      # bitbake -c cleanall arm-trusted-firmware u-boot
      # bitbake arm-trusted-firmware u-boot