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Review of test programs



  • requires 2 machines
  • requires parallel port (not many embedded boards have this)
  • uses TSC, which is i386-specific


  • built into the rt-preempt patch
  • 2-machine system gives unbiased timing results
    • instrumentation does not interfere with the timings



  • is one-machine
  • uses /dev/rtc, does not use timer interrupt
    • this isolates the ISR handling from timer operations
  • is a very simple test


  • uses TSC, which is i386-specific
  • doesn't have an instrumentation point in the kernel
    • no measurement of int latency, only process start latency
  • process start latency is "guessed" from expected interrupt time
    • that is, it is not actually measured
  • not all boards have a working /dev/rtc driver

igel test

This tests scheduling latency on receipt of a character on an SM501 uart. The UART driver gets a timestamp on ISR start, and can be asked for them from user-space after a run. The user-space driver measures the time from ISR start to task start. Test is specific to SH architecture. Uses SH hardware timer.

SH4 running at 240 MHZ, 64 MB memory.

See http://tree.celinuxforum.org/CelfPubWiki/UserLevelDeviceDriver (page is in Japanese)

See also: CELF Jamboree 14 presentation

  • Yung Joon will ask Takao Ikoma to translate this page.
  • Matsubara-san will update the driver and some of the text on the page.
    • will attach latest driver source
  • Tim will provide Ikoma-san e-mail


Need to investigate, but looks like a test of scheduling latency.