Difference between revisions of "VideoCore IV 3D Architecture Reference Guide errata"

From eLinux.org
Jump to: navigation, search
(Add "See also" section)
m (Update)
 
Line 6: Line 6:
  
 
== p13 ==
 
== p13 ==
The box surrounding "Scoreboard" is "TileBuffer (TLB)".
+
The box around "Scoreboard" is "TileBuffer (TLB)".
  
 
== p17 Figure 2 ==
 
== p17 Figure 2 ==
Line 51: Line 51:
 
== p94 ==
 
== p94 ==
 
The addresses of V3D_DBQITC and V3D_DBQITE are not listed in p82-p84.
 
The addresses of V3D_DBQITC and V3D_DBQITE are not listed in p82-p84.
 +
According to /opt/vc/src/hello_pi/hello_fft/gpu_fft_base.c:
 +
<pre>#define V3D_DBQITE  (0xC00e2c>>2)
 +
#define V3D_DBQITC  (0xC00e30>>2)</pre>
  
 
== p99 Table 84==
 
== p99 Table 84==
Line 57: Line 60:
  
 
= See also =
 
= See also =
 +
* [http://vc4-notes.tumblr.com/post/124884410609/define-v3dl2cactl-0xc00020-2-define http://vc4-notes.tumblr.com/post/124884410609/define-v3dl2cactl-0xc00020-2-define]
 
* [http://vc4-notes.tumblr.com/post/125039428234/v3d-registers-not-on-videocore-iv-3d-architecture V3D registers not on VideoCore IV 3D Architecture Reference Manual but on Brcm_Android_ICS_Graphics_Stack]
 
* [http://vc4-notes.tumblr.com/post/125039428234/v3d-registers-not-on-videocore-iv-3d-architecture V3D registers not on VideoCore IV 3D Architecture Reference Manual but on Brcm_Android_ICS_Graphics_Stack]

Latest revision as of 09:05, 29 January 2016

VideoCore IV 3D Architecture Reference Guide errata

The first version of the datasheet (VideoCoreIV-AG100-R) was published in 2013/9/16 at www.broadcom.com.

It has some typos. Some of them make it difficult to understand the document.

p13

The box around "Scoreboard" is "TileBuffer (TLB)".

p17 Figure 2

"PACK" part is drew as if it can write to entire regfile a. But it only supports ra[0:15].

p23

"SQRT, RECIPSQRT, LOG, EXP" should be "RECIP, RECIPSQRT, LOG, EXP".

p32 Table 8

"R4 Pack Encoding" should be "R4 Unpack Encoding".

p32 Table 9

"5 32->8a" should be "5 32->8b".

"6 32->8a" should be "5 32->8c".

"7 32->8a" should be "5 32->8d".

p42 Table 17 PTYPE=3

"0 - Reserved" should be "11 - Reserved".

p45 Table 24

The last column "Bits" is not needed.

p69 Table 38 code=64

"28 0" should be "28 4".

p70 Table 38

The code "Clipper Z Scale and Offset" after the code "Clipper XY Scaling" should be 106.

p84 name=V3D_FDBGB

"FEP Interface Ready and Stall Signals, FEP Busy Signals" should be "FEP Interface Ready and Stall Signals, plus FEP Busy Signals".

p86 Table 53

"Control List Executor Thread List Counter" should be "Control List Executor Thread n List Counter".

p87 Table 54

"Control List Executor Thread Primitive List Counter" should be "Control List Executor Thread n Primitive List Counter".

p90

There is an extra "\" above the Table 65.

p94

The addresses of V3D_DBQITC and V3D_DBQITE are not listed in p82-p84. According to /opt/vc/src/hello_pi/hello_fft/gpu_fft_base.c:

#define V3D_DBQITE  (0xC00e2c>>2)
#define V3D_DBQITC  (0xC00e30>>2)

p99 Table 84

Writing 1 to V3D_PCTRE:31 is needed to enable performance counters according to Brcm_Android_ICS_Graphics_Stack/brcm_usrlib/dag/vmcsx/middleware/khronos/common/2707b/khrn_prod_4.c. But the bit is not described. (Written as "reserved".)

See also